Patents by Inventor Jeffrey D. Kasyon

Jeffrey D. Kasyon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • N-deep fixed latency fall-through FIFO architecture
    Patent number: 5956492
    Abstract: A first-in-first-out (FIFO) memory system. The FIFO memory system contains a first fall-through FIFO having an input and an output. A pointer-based FIFO having an input and an output, wherein the input of the pointer-based FIFO is connected to the output of the first fall-through FIFO. The FIFO memory system also includes a second fall-through FIFO having an input and an output, wherein the input of the second fall-through FIFO is connected to the output of the pointer-based FIFO, wherein data placed into the input of the first fall-through FIFO appears at the output of the second fall-through FIFO in a first-in-first-out basis.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: September 21, 1999
    Assignee: LSI Logic Corporation
    Inventors: Mark J. Jander, Jeffrey D. Kasyon