Abstract: A power management circuit supporting fast voltage switching with reduced rush current is provided. The power management circuit is configured to provide an average power tracking (APT) voltage to a power amplifier circuit for amplifying an analog signal. Moreover, the power management circuit must be able to adapt the APT voltage frequently and rapidly to enable such application as dynamic power control. In embodiments disclosed herein, the power management circuit can be configured to opportunistically activate a voltage amplifier, which is typically used to generate an envelope tracking (ET) voltage, at an appropriate time to help support fast switching of the APT voltage. As a result, the power management circuit is able to adapt the APT voltage frequently and rapidly. Furthermore, by utilizing the voltage amplifier to support fast switching of the APT voltage, it is also possible to reduce rush current in the power management circuit.

Abstract: The present disclosure discloses a direct current (DC)-DC boost converter, which includes a battery terminal providing a battery voltage, a charge pump coupled between the battery terminal and an interior node, and a power inductor coupled between the interior node and a power supply terminal that provides a power voltage to a radio frequency transceiver. The charge pump is configured to provide an interior voltage at the interior node based on the battery voltage. Herein, the interior voltage toggles between the battery voltage and two times the battery voltage. The charge pump includes a first switch coupled between the battery terminal and the interior node, a second switch coupled between the battery terminal and a connecting node, a third switch coupled between the connecting node and ground, and a flying capacitor coupled between the interior node and the connecting node of the second switch and the third switch.

Abstract: A multi-level charge pump (MCP) circuit is provided. The MCP circuit includes a multi-level voltage circuit configured to receive a supply voltage and generate a low-frequency voltage. The multi-level voltage circuit includes a first switch path, a second switch path, and a third switch path each having a respective on-resistance and coupled in parallel between an input node and an output node. In a non-limiting example, the multi-level voltage circuit is configured to activate the first switch path and at least one of the second switch path and the third switch path when the multi-level voltage circuit generates the low-frequency voltage that equals the supply voltage. By activating at least two of the three switch paths to generate the low-frequency voltage, it may be possible to reduce an equivalent resistance of the multi-level voltage circuit, thus helping to improve efficiency and reduce power loss of the MCP circuit.

Abstract: The present disclosure discloses a direct current (DC)-DC boost converter, which includes a battery terminal providing a battery voltage, a charge pump coupled between the battery terminal and an interior node, and a power inductor coupled between the interior node and a power supply terminal that provides a power voltage to a radio frequency transceiver. The charge pump is configured to provide an interior voltage at the interior node based on the battery voltage. Herein, the interior voltage toggles between the battery voltage and two times the battery voltage. The charge pump includes a first switch coupled between the battery terminal and the interior node, a second switch coupled between the battery terminal and a connecting node, a third switch coupled between the connecting node and ground, and a flying capacitor coupled between the interior node and the connecting node of the second switch and the third switch.

Abstract: A multi-level charge pump (MCP) circuit is provided. The MCP circuit includes a multi-level voltage circuit configured to receive a supply voltage and generate a low-frequency voltage. The multi-level voltage circuit includes a first switch path, a second switch path, and a third switch path each having a respective on-resistance and coupled in parallel between an input node and an output node. In a non-limiting example, the multi-level voltage circuit is configured to activate the first switch path and at least one of the second switch path and the third switch path when the multi-level voltage circuit generates the low-frequency voltage that equals the supply voltage. By activating at least two of the three switch paths to generate the low-frequency voltage, it may be possible to reduce an equivalent resistance of the multi-level voltage circuit, thus helping to improve efficiency and reduce power loss of the MCP circuit.

Abstract: Aspects disclosed in the detailed description include an envelope tracking (ET) amplifier circuit. The ET amplifier circuit includes ET tracker circuitry configured to provide an ET modulated voltage, which tracks an ET modulated target voltage, to an amplifier circuit(s) for amplifying a radio frequency (RF) signal. The ET amplifier circuit also includes fast switcher circuitry that is activated to provide an alternate current (AC) current to the amplifier circuit(s) when the RF signal includes a higher number of resource blocks (RBs). However, the fast switcher circuitry and its associated control circuitry may incur a processing delay that can cause the fast switcher circuitry to lag behind the ET modulated target voltage. As such, the ET amplifier circuit further includes timing adjustment circuitry to help compensate for the processing delay, thus helping to maintain efficiency of the ET tracker circuitry for improved performance of the ET amplifier circuit.

Abstract: Aspects disclosed in the detailed description include an envelope tracking (ET) amplifier circuit. The ET amplifier circuit includes ET tracker circuitry configured to provide an ET modulated voltage, which tracks an ET modulated target voltage, to an amplifier circuit(s) for amplifying a radio frequency (RF) signal. The ET amplifier circuit also includes fast switcher circuitry that is activated to provide an alternate current (AC) current to the amplifier circuit(s) when the RF signal includes a higher number of resource blocks (RBs). However, the fast switcher circuitry and its associated control circuitry may incur a processing delay that can cause the fast switcher circuitry to lag behind the ET modulated target voltage. As such, the ET amplifier circuit further includes timing adjustment circuitry to help compensate for the processing delay, thus helping to maintain efficiency of the ET tracker circuitry for improved performance of the ET amplifier circuit.

Abstract: Aspects disclosed in the detailed description include an envelope tracking (ET) amplifier circuit. The ET amplifier circuit includes ET tracker circuitry configured to provide an ET modulated voltage, which tracks an ET modulated target voltage, to an amplifier circuit(s) for amplifying a radio frequency (RF) signal. The ET amplifier circuit also includes fast switcher circuitry that is activated to provide an alternate current (AC) current to the amplifier circuit(s) when the RF signal includes a higher number of resource blocks (RBs). However, the fast switcher circuitry and its associated control circuitry may incur a processing delay that can cause the fast switcher circuitry to lag behind the ET modulated target voltage. As such, the ET amplifier circuit further includes timing adjustment circuitry to help compensate for the processing delay, thus helping to maintain efficiency of the ET tracker circuitry for improved performance of the ET amplifier circuit.

Abstract: Aspects disclosed in the detailed description include an envelope tracking (ET) amplifier circuit. The ET amplifier circuit includes ET tracker circuitry configured to provide an ET modulated voltage, which tracks an ET modulated target voltage, to an amplifier circuit(s) for amplifying a radio frequency (RF) signal. The ET amplifier circuit also includes fast switcher circuitry that is activated to provide an alternate current (AC) current to the amplifier circuit(s) when the RF signal includes a higher number of resource blocks (RBs). However, the fast switcher circuitry and its associated control circuitry may incur a processing delay that can cause the fast switcher circuitry to lag behind the ET modulated target voltage. As such, the ET amplifier circuit further includes timing adjustment circuitry to help compensate for the processing delay, thus helping to maintain efficiency of the ET tracker circuitry for improved performance of the ET amplifier circuit.

Abstract: A multi-mode power management circuit is provided. The multi-mode power management circuit includes a second generation (2G) amplifier circuit(s) configured to amplify a 2G radio frequency (RF) signal for transmission in a 2G RF band(s). The multi-mode power management circuit includes a pair of tracker circuitries coupled to the 2G amplifier circuit. Each tracker circuitry includes a charge pump circuitry configured to generate a voltage and a current. When the 2G amplifier circuit amplifies the 2G RF signal for transmission in the 2G RF band(s), both charge pump circuitries are controlled to provide two currents to the 2G amplifier circuit. As a result, the 2G amplifier circuit is able to amplify the 2G RF signal to a higher power corresponding to a sum of the two currents for transmission in the 2G RF band(s).

Abstract: A USB hub capable of detecting a host connected to a port are disclosed. In an embodiment, a USB hub may include a first USB port, a second USB port, and a USB hub controller coupling the first USB port and the second USB port for data transmission between the first USB port and the second USB port. The USB hub controller may be configured to evaluate each USB port for a connection type. The USB hub controller may also be configured to identify an original host connected to the first USB port. The USB hub controller may also be configured to designate the first USB port as an upstream facing port for the purpose of USB communications. The USB hub controller may further be configured to designate the second USB port as a downstream facing port.

Abstract: The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail.

Abstract: The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail.

Abstract: The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail.

Abstract: The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail.

Abstract: The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail.