Abstract: At least certain embodiments of the disclosures relate to methods, devices, and data processing systems for thermal-based acoustic management. In one embodiment, a computer-implemented method defers one or more background tasks during normal operation of a system if the system has a reduced performance feature that allows reduced or throttled performance in a non-user state. The system enters a low power state (e.g., sleep state) to cool the system after a period of normal operation. The system enters a different low power state (e.g., dark wake state) with a reduced performance and performs at least one of the deferred background tasks while in this low power state without needing a cooling mechanism.

Abstract: At least certain embodiments of the disclosures relate to methods, devices, and data processing systems for thermal-based acoustic management. In one embodiment, a computer-implemented method defers one or more background tasks during normal operation of a system if the system has a reduced performance feature that allows reduced or throttled performance in a non-user state. The system enters a low power state (e.g., sleep state) to cool the system after a period of normal operation. The system enters a different low power state (e.g., dark wake state) with a reduced performance and performs at least one of the deferred background tasks while in this low power state without needing a cooling mechanism.

Abstract: A dictation computer that includes a fan speed regulator is described. The fan speed regulator monitors a speech recognition unit to determine when the speech recognition unit is activated. Upon detection that the speech recognition unit is activated, the fan speed regulator ducks the speed of a cooling fan embedded within the dictation computer to an optimized speed of rotation over a delay time interval. The fan speed regulator may include components to adapt the optimized speed and delay time to the characteristics of the dictation computer and the user. Other embodiments are also described.

Abstract: A pseudo-random test system which generates the text for a sequence of assembly language instructions by intermixing text instructions generated by pre-programmed operations from at least two test generators is provided. The test generators are executed to program operations into a test interpreter which mixes the operations and outputs text for a pseudo-random sequence of assembly language instructions for execution on a processor. In addition to mixing text instructions generated by pre-programmed operations, the system randomly allocates internal registers and provides self-checking constructs used to compare the processor's results with expected results.