Patents by Inventor Jeffrey David Jarriel
Jeffrey David Jarriel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12261677Abstract: Embodiments of systems and methods for combining downlink signals representative of a communication signal are provided herein. An example method comprises receiving the downlink signals from antenna feeds. In a first processing block(s) in a processor(s), performing a first blind detection operation on first packets of a first signal, and performing a first doppler compensation operation on the first packets. In a second processing block(s) in the processor(s) in parallel with the first processing block(s), performing a second blind detection operation on second packets of a second signal, and performing a second doppler compensation operation on the second packets. The method also comprises combining the first signal and the second signal based on (i) aligning the first data packets with the second data packets and (ii) performing a weighted combiner operation that applies scaling to the first and second packets based on corresponding signal quality.Type: GrantFiled: December 16, 2020Date of Patent: March 25, 2025Assignee: KRATOS INTEGRAL HOLDINGS, LLCInventors: Brandon Gregory King, Jeffrey David Jarriel, Matthew James Stoltenberg, Daniel Joseph Sutton
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Patent number: 12261687Abstract: Embodiments of systems and methods for modulating a downlink signals representative of a communication signal are provided herein. An example method comprises receiving an input signal; in a first one or more processing blocks in a one or more processors, performing a first modulation operation on first data packets of the input signal based on a modulation scheme for a receiver of the downlink signal; in a second one or more processing blocks in the one or more processors in parallel with the first one or more processing blocks, performing a second modulation operation on second data packets of the input signal based on the modulation scheme; and generating a waveform as the downlink signal based on performing the first and second modulation operations.Type: GrantFiled: May 27, 2021Date of Patent: March 25, 2025Assignee: KRATOS INTEGRAL HOLDINGS, LLCInventors: Jeffrey David Jarriel, Daniel Joseph Sutton, Matthew James Stoltenberg, Brandon Gregory King
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Publication number: 20250070861Abstract: Embodiments of systems and methods for managing channel bandwidth of signals are provided herein. Example method include receiving signals from one or more antenna feeds, each signal having a first bandwidth. Some example methods include, in a plurality of processing blocks operating in parallel in one or more processors, performing one or more channelizer operations on portions of the signals, each channelizer operation creates a plurality of channels having a bandwidth smaller than the first bandwidth. Some methods may include, in a plurality of processing blocks in the one or more processors, performing one or more combiner operations on the channels, each operation combines the bandwidth of a subset of the channels into a combined channel, the plurality of processing blocks operating in parallel. The method then outputs the combined channel to a network.Type: ApplicationFiled: November 7, 2024Publication date: February 27, 2025Inventors: Brandon Gregory King, Jeffrey David Jarriel, Matthew James Stoltenberg, Daniel Joseph Sutton
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Patent number: 12184390Abstract: Embodiments of systems and methods for managing channel bandwidth of signals are provided herein. Example method include receiving signals from one or more antenna feeds, each signal having a first bandwidth. Some example methods include, in a plurality of processing blocks operating in parallel in one or more processors, performing one or more channelizer operations on portions of the signals, each channelizer operation creates a plurality of channels having a bandwidth smaller than the first bandwidth. Some methods may include, in a plurality of processing blocks in the one or more processors, performing one or more combiner operations on the channels, each operation combines the bandwidth of a subset of the channels into a combined channel, the plurality of processing blocks operating in parallel. The method then outputs the combined channel to a network.Type: GrantFiled: December 16, 2020Date of Patent: December 31, 2024Assignee: KRATOS INTEGRAL HOLDINGS, LLCInventors: Brandon Gregory King, Jeffrey David Jarriel, Matthew James Stoltenberg, Daniel Joseph Sutton
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Publication number: 20240406044Abstract: Processing a digital bit stream and systems for implementing the methods are provided. The method includes dividing the digital bit stream into a plurality of data packets. In a first processing block performing a carrier recovery error calculation on a first portion of the plurality of data packets, comprising preforming a first phase locked loop (PLL) function on decimated data of the data packets and performing a carrier recovery operation on the first portion of the plurality of data packets. In a second processing block, in parallel with the processing of the first portion of the plurality of packets, performing the carrier recovery error calculation on a second portion of the plurality of data packets, comprising preforming the first PLL function on decimated data of the data packets and performing the carrier recovery operation on second portion of the plurality of data packets.Type: ApplicationFiled: August 12, 2024Publication date: December 5, 2024Inventors: Jeffrey David JARRIEL, Daniel Joseph SUTTON, Matthew James STOLTENBERG, Brandon Gregory KING
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Patent number: 12088443Abstract: Processing a digital bit stream and systems for implementing the methods are provided. The method includes dividing the digital bit stream into a plurality of data packets. In a first processing block performing a carrier recovery error calculation on a first portion of the plurality of data packets, comprising preforming a first phase locked loop (PLL) function on decimated data of the data packets and performing a carrier recovery operation on the first portion of the plurality of data packets. In a second processing block, in parallel with the processing of the first portion of the plurality of packets, performing the carrier recovery error calculation on a second portion of the plurality of data packets, comprising preforming the first PLL function on decimated data of the data packets and performing the carrier recovery operation on second portion of the plurality of data packets.Type: GrantFiled: January 20, 2022Date of Patent: September 10, 2024Assignee: KRATOS INTEGRAL HOLDINGS, LLCInventors: Jeffrey David Jarriel, Daniel Joseph Sutton, Matthew James Stoltenberg, Brandon Gregory King
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Patent number: 11863284Abstract: Embodiments of systems and methods for combining downlink signals representative of a communication signal are provided herein. An example method comprises receiving samples of the downlink signals from multiple antenna feeds; generating first symbols for a first signal and second symbols for a second signal based on performing timing recovery operations on the first signal and the second signal, respectively; generating offset information based on performing a correlator operation on the first and second symbols; and combining the first and second signals based on performing a weighted combiner operation. At least one of the first timing recovery operation, the second timing recovery operation, the correlator operation, and the combing are performed in a plurality of processing blocks in one or more processors, wherein the first and second processing block operate in parallel.Type: GrantFiled: May 27, 2021Date of Patent: January 2, 2024Assignee: KRATOS INTEGRAL HOLDINGS, LLCInventors: Jeffrey David Jarriel, Daniel Joseph Sutton, Matthew James Stoltenberg, Brandon Gregory King
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Publication number: 20230188142Abstract: Processing a digital bit stream and systems for implementing the methods are provided. The method includes dividing the digital bit stream into a plurality of data packets. In a first processing block performing a carrier recovery error calculation on a first portion of the plurality of data packets, comprising preforming a first phase locked loop (PLL) function on decimated data of the data packets and performing a carrier recovery operation on the first portion of the plurality of data packets. In a second processing block, in parallel with the processing of the first portion of the plurality of packets, performing the carrier recovery error calculation on a second portion of the plurality of data packets, comprising preforming the first PLL function on decimated data of the data packets and performing the carrier recovery operation on second portion of the plurality of data packets.Type: ApplicationFiled: January 20, 2022Publication date: June 15, 2023Inventors: Jeffrey David JARRIEL, Daniel Joseph Sutton, Matthew James Stoltenberg, Brandon Gregory King
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Publication number: 20230021682Abstract: Embodiments of systems and methods for combining downlink signals representative of a communication signal are provided herein. An example method comprises receiving the downlink signals from antenna feeds. In a first processing block(s) in a processor(s), performing a first blind detection operation on first packets of a first signal, and performing a first doppler compensation operation on the first packets. In a second processing block(s) in the processor(s) in parallel with the first processing block(s), performing a second blind detection operation on second packets of a second signal, and performing a second doppler compensation operation on the second packets. The method also comprises combining the first signal and the second signal based on (i) aligning the first data packets with the second data packets and (ii) performing a weighted combiner operation that applies scaling to the first and second packets based on corresponding signal quality.Type: ApplicationFiled: December 16, 2020Publication date: January 26, 2023Inventors: Brandon Gregory King, Jeffrey David Jarriel, Matthew James Stoltenberg, Daniel Joseph Sutton
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Publication number: 20230006733Abstract: Embodiments of systems and methods for managing channel bandwidth of signals are provided herein. Example method include receiving signals from one or more antenna feeds, each signal having a first bandwidth. Some example methods include, in a plurality of processing blocks operating in parallel in one or more processors, performing one or more channelizer operations on portions of the signals, each channelizer operation creates a plurality of channels having a bandwidth smaller than the first bandwidth. Some methods may include, in a plurality of processing blocks in the one or more processors, performing one or more combiner operations on the channels, each operation combines the bandwidth of a subset of the channels into a combined channel, the plurality of processing blocks operating in parallel. The method then outputs the combined channel to a network.Type: ApplicationFiled: December 16, 2020Publication date: January 5, 2023Inventors: Brandon Gregory King, Jeffrey David Jarriel, Matthew James Stoltenberg, Daniel Joseph Sutton
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Publication number: 20220385391Abstract: Embodiments of systems and methods for modulating a downlink signals representative of a communication signal are provided herein. An example method comprises receiving an input signal; in a first one or more processing blocks in a one or more processors, performing a first modulation operation on first data packets of the input signal based on a modulation scheme for a receiver of the downlink signal; in a second one or more processing blocks in the one or more processors in parallel with the first one or more processing blocks, performing a second modulation operation on second data packets of the input signal based on the modulation scheme; and generating a waveform as the downlink signal based on performing the first and second modulation operations.Type: ApplicationFiled: May 27, 2021Publication date: December 1, 2022Inventors: Jeffrey David JARRIEL, Daniel Joseph SUTTON, Matthew James STOLTENBERG, Brandon Gregory KING
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Publication number: 20220385353Abstract: Embodiments of systems and methods for combining downlink signals representative of a communication signal are provided herein. An example method comprises receiving samples of the downlink signals from multiple antenna feeds; generating first symbols for a first signal and second symbols for a second signal based on performing timing recovery operations on the first signal and the second signal, respectively; generating offset information based on performing a correlator operation on the first and second symbols; and combining the first and second signals based on performing a weighted combiner operation. At least one of the first timing recovery operation, the second timing recovery operation, the correlator operation, and the combing are performed in a plurality of processing blocks in one or more processors, wherein the first and second processing block operate in parallel.Type: ApplicationFiled: May 27, 2021Publication date: December 1, 2022Inventors: Jeffrey David JARRIEL, Daniel Joseph SUTTON, Matthew James STOLTENBERG, Brandon Gregory KING
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Publication number: 20220374562Abstract: Embodiments of systems and methods for simulating a downlink signal representative of a communication signal are provided herein. An example method comprises receiving an input signal; in a first one or more processing blocks in a one or more processors, performing a first operation to determine first one or more simulated effects representative of one or more effects that result from movement of a source of the downlink signal; in a second one or more processing blocks in the one or more processors in parallel with the first one or more processing blocks, performing a second operation to determine second one or more simulated effects representative of the one or more effects that result from movement of the source of the downlink signal; generating a simulated downlink signal by applying the first and second one or more simulated effects to the input signal; and outputting the simulated downlink signal.Type: ApplicationFiled: May 27, 2021Publication date: November 24, 2022Inventors: Jeffrey David JARRIEL, Daniel Joseph SUTTON, Matthew James STOLTENBERG, Brandon Gregory KING
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Patent number: 11431428Abstract: Systems, methods, and computer-readable media for processing a digital bit stream representative of a communication signal are provided. The method can include dividing, at one or more processors, the digital bit stream into a plurality of data packets, each having an overlap of data from an adjacent packet. The method can include performing a timing recovery operation and a carrier recovery operation on portions of the plurality of data packets in multiple processing blocks in the processor, in parallel. The method can include combining the first plurality and the second plurality based on timing and phase stitching.Type: GrantFiled: September 24, 2020Date of Patent: August 30, 2022Assignee: KRATOS INTEGRAL HOLDINGS, LLCInventors: Brandon Gregory King, Jeffrey David Jarriel
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Publication number: 20210250113Abstract: Systems, methods, and computer-readable media for processing a digital bit stream representative of a communication signal are provided. The method can include dividing, at one or more processors, the digital bit stream into a plurality of data packets, each having an overlap of data from an adjacent packet. The method can include performing a timing recovery operation and a carrier recovery operation on portions of the plurality of data packets in multiple processing blocks in the processor, in parallel. The method can include combining the first plurality and the second plurality based on timing and phase stitching.Type: ApplicationFiled: September 24, 2020Publication date: August 12, 2021Inventors: Brandon Gregory King, Jeffrey David Jarriel
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Patent number: 10790920Abstract: Systems, methods, and computer-readable media for processing a digital bit stream representative of a communication signal are provided. The method can include dividing, at one or more processors, the digital bit stream into a plurality of data packets, each having an overlap of data from an adjacent packet. The method can include performing a timing recovery operation and a carrier recovery operation on portions of the plurality of data packets in multiple processing blocks in the processor, in parallel. The method can include combining the first plurality and the second plurality based on timing and phase stitching.Type: GrantFiled: December 21, 2018Date of Patent: September 29, 2020Assignee: Kratos Integral Holdings, LLCInventors: Brandon Gregory King, Jeffrey David Jarriel
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Publication number: 20200204281Abstract: Systems, methods, and computer-readable media for processing a digital bit stream representative of a communication signal are provided. The method can include dividing, at one or more processors, the digital bit stream into a plurality of data packets, each having an overlap of data from an adjacent packet. The method can include performing a timing recovery operation and a carrier recovery operation on portions of the plurality of data packets in multiple processing blocks in the processor, in parallel. The method can include combining the first plurality and the second plurality based on timing and phase stitching.Type: ApplicationFiled: December 21, 2018Publication date: June 25, 2020Inventors: Brandon Gregory King, Jeffrey David Jarriel