Abstract: A method and apparatus are provided for implementing a cache state as history of read/write shared data for a cache in a shared memory multiple processor computer system. An invalid temporary state for a cache line is provided in addition to modified, exclusive, shared, and invalid states. The invalid temporary state is entered when a cache releases a modified cache line to another processor. The invalid temporary state is used to enable effective optimizations within cache coherent symmetric multiprocessor (SMP) systems of an SMP caching hierarchy with distributed caches with different caching coherency traffic profiles for both commercial and technical workloads.

Abstract: A method and apparatus are provided for implementing thread replacement for optimal performance in a two-tiered multithreading structure. A first tier thread state storage stores a limited number of runnable thread register states. A second tier thread storage facility stores a second number of thread states that is greater than the limited number of runnable thread register states. Each stored thread state includes predefined selection data. A runnable thread selection logic coupled between the first tier thread state storage and the second tier thread storage facility, uses the stored predefined selection data for selectively exchanging thread states between the first tier limited number of runnable thread register states and the second tier thread storage facility.

Abstract: A memory architecture and method of partitioning a computer memory. The architecture includes a cache section, a setup table, and a compressed storage, all of which are partitioned from a computer memory. The cache section is used for storing uncompressed data and is a fast access memory for data which is frequently referenced. The compressed storage is used for storing compressed data. The setup table is used for specifying locations of compressed data stored within the compressed storage. A high speed uncompressed cache directory is coupled to the memory for determining if data is stored in the cache section or compressed storage and for locating data in the cache.

Abstract: In a data processing system, data from an input buffer is compressed to produce a compressed data set in a compressed data buffer, wherein the compressed data set has a Lempel-Ziv compressed data format having raw-byte tokens and string tokens. The string tokens in the compressed data set each have a predetermined number of bits, thereby facilitating efficient, high-speed parsing of tokens during subsequent decompression of the compressed data set. In some embodiments, the raw-byte tokens and the string tokens have the same predetermined number of bits.

Abstract: A data compression utilization method and apparatus are provided for a computer main store. An amount of unused memory in the computer system main store is dynamically calculated and compared with a plurality of predefined threshold values. One interrupt of a plurality of predefined interrupts is selectively generated responsive to the compared values. Then the usage of the computer system main store is adjusted responsive to the generated interrupt.