Patents by Inventor Jeffrey Dunnihoo

Jeffrey Dunnihoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070120192
    Abstract: The present invention provides a single ESD device package that can be used to provide ESD protection to multiple high-speed lines, in particular multiple high-speed differential lines. The present invention has various aspects. Minute parasitic matching is achieved within a single package, and TMDS signal discontinuities are reduced by allowing uniform straight through routing. Also, the straight through routing and pin locations are matched to allow those straight routing lines to mate directly to high speed lines. Also, straight ground lines having a single via are associated with the straight through routing lines.
    Type: Application
    Filed: November 30, 2005
    Publication date: May 31, 2007
    Inventors: Jeffrey Dunnihoo, Chadwick Marak, Michael Evans
  • Patent number: 6661122
    Abstract: A method of controlling a power supply having an output activated in response to a first logic level of a control signal and deactivated in response to a second logic level of the control signal. A clock is generated on a second power source and used to time a time-out period of a selected number of clock periods. In response to the step of sensing, if the state of the output of the power supply is inactive through the timeout period, then the first logic level of the control signal is generated to activate the power supply for use in powering operations of an associated device. After completion of these operations, the second logic level of the control signal is generated to deactivate the power supply. If however, the state of the output of the power supply is active during the time-out period, then the first logic level of the control signal is maintained to power operations of the associated device.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: December 9, 2003
    Assignee: Cirrus Logic, Inc.
    Inventor: Jeffrey Dunnihoo