Patents by Inventor Jeffrey Durec

Jeffrey Durec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6249170
    Abstract: An improved logarithmic amplifier (100) and method in which a signal at an output (106) is logarithmic with respect to the voltage supplied at a gain control input (102). The logarithmic amplifier (100) includes a first amplifier stage (110) and a second amplifier stage (130) which are coupled together by a current mirror stage (120). Alternative embodiments of logarithmic amplifier (200) and (300) include different biasing methods for biasing the second amplifier stage (130).
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: June 19, 2001
    Assignee: Motorola, Inc.
    Inventors: William E. Main, Danielle L. Coffing, Jeffrey Durec
  • Patent number: 5592076
    Abstract: A compensation circuit (26, 27, 28, 29) supplies base currents to a plurality of current sources (22, 25) attached to a regulator (50), thereby reducing the load on the regulator and improving overall circuit performance. The compensation circuit measures a single base current, multiplies it by the number of current sources to be supplied, and then provides the multiplied current to a base bus (40) coupled to the bases of the plurality of current sources. The compensation circuit has a very high output impedance with essentially no variation with supply voltage.
    Type: Grant
    Filed: July 3, 1995
    Date of Patent: January 7, 1997
    Assignee: Motorola, Inc.
    Inventors: William E. Main, Jeffrey Durec