Patents by Inventor Jeffrey E. Conner

Jeffrey E. Conner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit for performing high-speed, low latency frame relay switching with support for fragmentation and reassembly and channel multiplexing
    Patent number: 6208650
    Abstract: The present invention is a hardware implementation of frame relay switching functions which provides for real time concurrent multiple processes by implementing the processes in dedicated hardware logic operating in parallel, whereas in a typical software implementation the processes are sequentially processed. While data structures in software based implementations are accessed on some multiple of a byte regardless of the logical structure of the data, in the hardware implementation of the present invention the physical widths and the logical widths of the data structure elements are identical. This allows direct access of the logical structure by the operating process.
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: March 27, 2001
    Assignee: Paradyne Corporation
    Inventors: Suzanne Hassell, Patrick A. McCabe, Louis F. Villarosa, Jr., Jeffrey E. Conner