Abstract: A system is provided for transferring 32-bit data words between a 32-bit host personal computer and an IDE peripheral storage device adapted to transfer data as 16-bit words and store the data in a data register identified by an offset address. The system microprocessor transfers 32-bit data words from an internal 32-bit data transfer register in two sequential 16-bit words without an intervening input or output instruction and automatically increments the offset address associated with the second 16-bit word. A device driver program or a peripheral BIOS directs the microprocessor to address data transfers from the 32-bit register to an alias address, the offset address portion of which is incremented for the second 16-bit word. An interface adapter circuit is provided which includes logic circuitry for recognizing an address as an alias, and translating the offset portion of the alias address to offset address associated with the peripheral's data register.