Patents by Inventor Jeffrey Eldon Johnson

Jeffrey Eldon Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7843213
    Abstract: A memory device is coupled to a subset of lines of a data input/output (I/O) bus. The memory device includes an on-die active termination circuit for terminating the subset of lines of the data I/O bus with a selected impedance being one of a plurality of selectable impedances; a termination value register being coupled to the on-die active termination circuit for storing a value representing the selected impedance; and a termination value setting circuit being coupled to the termination value register, for setting the value representing the selected impedance in the termination value register.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: November 30, 2010
    Assignee: Nanya Technology Corp.
    Inventors: Peter Linder, Jeffrey Eldon Johnson, James Sanford Wallace
  • Publication number: 20100299468
    Abstract: A memory device is coupled to a subset of lines of a data input/output (I/O) bus. The memory device includes an on-die active termination circuit for terminating the subset of lines of the data I/O bus with a selected impedance being one of a plurality of selectable impedances; a termination value register being coupled to the on-die active termination circuit for storing a value representing the selected impedance; and a termination value setting circuit being coupled to the termination value register, for setting the value representing the selected impedance in the termination value register.
    Type: Application
    Filed: May 21, 2009
    Publication date: November 25, 2010
    Inventors: Peter Linder, Jeffrey Eldon Johnson, James Sanford Wallace