Patents by Inventor Jeffrey Erhardt

Jeffrey Erhardt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICE WITH HIGH CONDUCTIVITY REGION USING SHALLOW TRENCH
    Publication number: 20070166938
    Abstract: A structure is provided for an integrated circuit with a semiconductor substrate having an opening provided therein. A doped high conductivity region is formed from doped material in the opening and a diffused dopant region proximate the doped material in the opening. A structure is over the doped high conductivity region selected from a group consisting of a wordline, a gate, a dielectric layer, and a combination thereof.
    Type: Application
    Filed: March 13, 2007
    Publication date: July 19, 2007
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Jeffrey Erhardt, Kashmir Sahota, Emmanuil Lingunis, Nga-Ching Wong
  • Methods and systems for controlling resist residue defects at gate layer in a semiconductor device manufacturing process
    Patent number: 6759179
    Abstract: Methods and systems are disclosed for reducing resist residue defects in a semiconductor manufacturing process. The methods comprise appropriate adjustment of hardware, substrate, resist, developer, and process variables in order to remove resist residues from a semiconductor substrate structure in order to reduce resist residue defects therein, including special vapor prime and development operations.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: July 6, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Khoi A. Phan, Jeffrey Erhardt, Jerry Cheng, Richard J. Bartlett, Anthony P. Coniglio, Wolfram Grundke, Carol M. Bradway, Daniel E. Sutton, Martin Mazur
  • Methods and systems for controlling resist residue defects at gate layer in a semiconductor device manufacturing process
    Patent number: 6649525
    Abstract: Methods and systems are disclosed for reducing resist residue defects in a semiconductor manufacturing process. The methods comprise appropriate adjustment of hardware, substrate, resist, developer, and process variables in order to remove resist residues from a semiconductor substrate structure in order to reduce resist residue defects therein. The method may comprise employing an anti reflective coating prior to applying a photo resist coating in a semiconductor manufacturing process. Also disclosed are methodologies for exhausting resist residue during development via a rinsing fluid.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: November 18, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Khoi A. Phan, Jeffrey Erhardt, Jerry Cheng, Richard J. Bartlett, Anthony P. Coniglio, Wolfram Grundke, Carol M. Bradway, Daniel E. Sutton, Martin Mazur