Patents by Inventor Jeffrey F. McElroy

Jeffrey F. McElroy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7538685
    Abstract: A method, apparatus and computer program product for providing auditory feedback in a personal virtual assistant (PVA) is presented. A user communication is received at the PVA. A determination is made whether an event sound is required in response to the receiving a user communication and upon determination that an event sound is required, an event sound is provided to the user and upon determination that an event sound is not required an event sound is not provided to the user. A response to the communication received from the user is determined and is transmitted to the user.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: May 26, 2009
    Assignee: Avaya Inc.
    Inventors: Robert Samuel Cooper, Derek Sanders, Jeffrey F. McElroy
  • Patent number: 6055373
    Abstract: A digital processing system including a central processing unit (CPU) and a digital signal processor (DSP) is optimized for digital signal processing applications, providing the central processing unit and digital signal processor with equal access to system resources such as system memory and connected I/O devices. The digital processing system includes two high-performance processor busses: one processor bus providing connection for one to four CPUs; the other processor bus providing connection for up to four DSPs. An advanced multi-ported memory controller interconnects the two processor busses with system memory and a system I/O bus, providing the CPUs and DSPs with equal and uniform access to all system memory and I/O resources.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: April 25, 2000
    Assignee: NCR Corporation
    Inventors: Jeffrey F. McElroy, Jimmy D. Pike
  • Patent number: 5951659
    Abstract: A communications-oriented computer system backplane including an input/output bus for transmission of address, data, and control information, the input/output bus including a plurality of expansion slot module connected to the input/output bus for the connection of I/O logic cards; and a time-domain multiplexed signal bus (TDMSB) for transmission of high-speed digitized signal information, the time-domain multiplexed signal bus including a plurality of expansion slot modules connected to the time-domain multiplexed signal bus for the connection of high-speed digitized signal logic cards. The expansion modules associated with the two busses are aligned to facilitate interconnecting the input/output bus with the time-domain multiplexed signal bus for transmitting data therebetween.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: September 14, 1999
    Assignee: NCR Corporation
    Inventors: Jeffrey F. McElroy, Jimmy D. Pike, Robert S. Cooper