Patents by Inventor Jeffrey Flynn

Jeffrey Flynn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230093073
    Abstract: Provided herein are methods and compositions for community-based screening of polymicrobial infections for the selection and administration of antibiotics and antibiotic combinations for treating infections associated with diseases such as cystic fibrosis, chronic obstructive pulmonary disease, and chronic sinus infections. The methods and compositions of this disclosure are advantageous in the sense that antibiotic effectiveness is assessed with respect to a community of microbes rather than a single microbial population, thus reflecting more accurately the in vivo disease environment and enabling the identification of beneficial antimicrobial therapeutics even when the primary bacterial strain shows antibiotic resistance.
    Type: Application
    Filed: February 12, 2021
    Publication date: March 23, 2023
    Applicant: REGENTS OF THE UNIVERSITY OF MINNESOTA
    Inventors: Ryan HUNTER, Jeffrey FLYNN, Lydia CAMERON
  • Publication number: 20070018198
    Abstract: An electronic device structure comprises a substrate layer of semi-insulating AlxGayInzN, a first layer comprising AlxGayInzN, a second layer comprising Alx?Gay?Inz?N, and at least one conductive terminal disposed in or on any of the foregoing layers, with the first and second layers being adapted to form a two dimensional electron gas is provided. A thin (<1000 nm) III-nitride layer is homoepitaxially grown on a native semi-insulating III-V substrate to provide an improved electronic device (e.g., HEMT) structure.
    Type: Application
    Filed: July 20, 2005
    Publication date: January 25, 2007
    Inventors: George Brandes, Xueping Xu, Joseph Dion, Robert Vaudo, Jeffrey Flynn
  • Publication number: 20060228584
    Abstract: A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the <0001> direction predominantly toward a direction selected from the group consisting of <10-10> and <11-20> directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 ?m2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm?2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.
    Type: Application
    Filed: May 11, 2006
    Publication date: October 12, 2006
    Inventors: Xueping Xu, Robert Vaudo, Jeffrey Flynn, George Brandes
  • Publication number: 20050167697
    Abstract: The present invention relates to various switching device structures including Schottky diode (10), P-N diode, and P-I-N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers (16) of low dopant concentration (<1E16 cm?3) grown on a conductive GaN layer (14). The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).
    Type: Application
    Filed: April 30, 2003
    Publication date: August 4, 2005
    Inventors: Jeffrey Flynn, George Brandes, Robert Vaudo
  • Publication number: 20050104162
    Abstract: A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the <0001> direction predominantly toward a direction selected from the group consisting of <10-10> and <11-20> directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 ?m2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm?2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.
    Type: Application
    Filed: November 14, 2003
    Publication date: May 19, 2005
    Inventors: Xueping Xu, Robert Vaudo, Jeffrey Flynn, George Brandes
  • Patent number: 6010562
    Abstract: A painting system includes a paint spray booth ventilated by process air including a combination of outside make-up air and a portion of the exiting process air which is returned to the booth, the returned air being the main component of the combination. The humidity of the air in the paint spray booth is controlled by routing a first minor portion of the process air, exiting the booth, through a desiccant dehumidifier, which removes moisture and volatile organic compounds (VOCs) from this process air portion before it is sent back to the paint spray booth. The dehumidifier is designed so that at any given time the process air portion contacts only part of the desiccant bed while air heated to approximately 250.degree. F. in a paint cure oven is exhausted from the oven and directed through the remaining part of the desiccant bed in order to dry, and thus regenerate, the desiccant for continued use.
    Type: Grant
    Filed: September 5, 1997
    Date of Patent: January 4, 2000
    Inventors: Paul Jeffrey Flynn, William Carl Nowack, Philip Leroy Carter