Patents by Inventor Jeffrey Fortin

Jeffrey Fortin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7560788
    Abstract: According to some embodiments, a conducting layer is formed on a first wafer. An insulating layer is formed on a second wafer. The insulating layer includes a cavity and a conducting area may be formed in the second wafer proximate to the cavity. The side of the conducting layer opposite the first wafer is bonded to the side of the insulating layer opposite the second wafer. At least some of the first wafer is then removed, without removing at least some of the conducting layer, to form a conducting diaphragm that is substantially parallel to the second wafer. In this way, an amount of capacitance between the diaphragm and the conducting area may be measured to determine an amount of pressure being applied to the diaphragm.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: July 14, 2009
    Assignee: General Electric Company
    Inventors: Jeffrey Fortin, Guanghua (George) Wu, Kanakasabapathi Subramanian
  • Patent number: 7305889
    Abstract: According to some embodiments, an apparatus includes a substrate that defines a plane. The apparatus also includes a first conducting plate that is substantially normal to the substrate and a second conducting plate that is (i) substantially normal to the substrate and (ii) deformable in response to a pressure.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: December 11, 2007
    Assignee: General Electric Company
    Inventors: Jeffrey Fortin, Kuna Kishore, Kanakasabapathi Subramanian
  • Patent number: 7296476
    Abstract: According to some embodiments, an apparatus includes a substrate that defines a plane. The apparatus also includes a first conducting plate that is substantially normal to the substrate and a second conducting plate that is (i) substantially normal to the substrate and (ii) deformable in response to a pressure.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: November 20, 2007
    Assignee: General Electric Company
    Inventors: Jeffrey Fortin, Kuna Kishore, Kanakasabapathi Subramanian
  • Publication number: 20070143934
    Abstract: A method for determining detergent concentration includes performing a photometric analysis of a wash fluid during an article laundering process, and determining a concentration of a detergent within the wash fluid based at least in part upon the photometric analysis. Furthermore, an apparatus for determining detergent concentration includes a fluid chamber to hold a wash fluid for washing articles, and an optical sensor optically coupled to the fluid chamber to determine a detergent concentration within the wash fluid based at least in part upon photometric properties of the wash fluid.
    Type: Application
    Filed: December 22, 2005
    Publication date: June 28, 2007
    Inventors: Radislav Potyrailo, Jeffrey Fortin, William Morris, Patrick Pastecki, Derek Watkins
  • Publication number: 20070143933
    Abstract: A method for controlling a laundering process includes determining a concentration of a detergent within a wash fluid during at least one cycle of an article laundering process, and dynamically adjusting at least one characteristic of the laundering process based at least in part upon the determined concentration of the detergent. An apparatus for controlling a laundering process includes a fluid chamber to contain a wash fluid, a sensor coupled to the fluid chamber to determine a detergent concentration within the wash fluid, and a controller coupled to the sensor and configured to dynamically adjust at least one characteristic of the laundering process based at least in part upon the determined detergent concentration.
    Type: Application
    Filed: December 22, 2005
    Publication date: June 28, 2007
    Inventors: Radislav Potyrailo, Patrick Pastecki, Derek Watkins, Jeffrey Fortin, William Morris
  • Publication number: 20070141808
    Abstract: According to some embodiments, a conducting layer is formed on a first wafer. An insulating layer is formed on a second wafer. The insulating layer includes a cavity and a conducting area may be formed in the second wafer proximate to the cavity. The side of the conducting layer opposite the first wafer is bonded to the side of the insulating layer opposite the second wafer. At least some of the first wafer is then removed, without removing at least some of the conducting layer, to form a conducting diaphragm that is substantially parallel to the second wafer. In this way, an amount of capacitance between the diaphragm and the conducting area may be measured to determine an amount of pressure being applied to the diaphragm.
    Type: Application
    Filed: February 22, 2007
    Publication date: June 21, 2007
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Jeffrey Fortin, Guanghua Wu, Kanakasabapathi Subramanian
  • Publication number: 20070138584
    Abstract: According to some embodiments, a conducting layer is formed on a first wafer. An insulating layer is formed on a second wafer. The insulating layer includes a cavity and a conducting area may be formed in the second wafer proximate to the cavity. The side of the conducting layer opposite the first wafer is bonded to the side of the insulating layer opposite the second wafer. At least some of the first wafer is then removed, without removing at least some of the conducting layer, to form a conducting diaphragm that is substantially parallel to the second wafer. In this way, an amount of capacitance between the diaphragm and the conducting area may be measured to determine an amount of pressure being applied to the diaphragm.
    Type: Application
    Filed: February 22, 2007
    Publication date: June 21, 2007
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Jeffrey Fortin, George Wu, Kanakasabapathi Subramanian
  • Publication number: 20070126548
    Abstract: According to some embodiments, a first layer of doped material may be provided to form a resistor. A second layer of undoped material may then be formed on the first layer. The first layer might comprise, for example, a layer of doped silicon carbide while the second layer comprises a layer of undoped silicon carbide. The resistance of the resistor may then be measured to determine a temperature.
    Type: Application
    Filed: January 3, 2007
    Publication date: June 7, 2007
    Inventors: Aaron Knobloch, Jeffrey Fortin, David Geer
  • Publication number: 20070000330
    Abstract: A pressure sensor is provided. The pressure sensor includes a multi-layer laminate comprising a substrate and a semiconductor layer, wherein the substrate comprises single crystal or quasi-single crystal aluminum oxide, and a portion of the substrate that is spaced from a peripheral edge is wet etched to form an inwardly facing sidewall that defines a volume; and a substrate to which the multi-layer laminate is secured. The volume is an enclosed volume further defined by a substrate surface.
    Type: Application
    Filed: September 6, 2006
    Publication date: January 4, 2007
    Applicant: General Electric Company
    Inventors: Steven Tysoe, Mark D'Evelyn, Charles Becker, Abasifreke Ebong, Stephen Arthur, Steven LeBoeuf, Robert Wojnarowski, Samhita Dasgupta, Vinayak Tilak, Kanakasabapathi Subramanian, Jeffrey Fortin
  • Publication number: 20060289386
    Abstract: An etchant including a halogenated salt, such as Cryolite (Na3AlF6) or potassium tetrafluoro borate (KBF4), is provided. The salt may be present in the etchant in an amount sufficient to etch a substrate and may have a melt temperature of greater than about 200 degrees Celsius. A method of wet etching may include contacting an etchant to at least one surface of a support layer of a multi-layer laminate, wherein the support layer may include aluminum oxide; or contacting an etchant to at least one surface of a support layer of a multi-layer laminate, wherein the etchant may include Cryolite (Na3AlF6), potassium tetrafluoro borate (KBF4), or both; and etching at least a portion of the support layer. The method may provide a laminate produced by growing a crystal onto an aluminum oxide support layer, and chemically removing at least a portion of the support layer by wet etch. An electronic device, optical device or combined device including the laminate is provided.
    Type: Application
    Filed: June 27, 2005
    Publication date: December 28, 2006
    Inventors: Steven Tysoe, Steven LeBoeuf, Mark D'Evelyn, Venkat Venkataramani, Vinayak Tilak, Jeffrey Fortin, Charles Becker, Stephen Arthur, Samhita Dasgupta, Kanakasabapathi Subramanian, Robert Wojnarowski, Abasifreke Ebong
  • Publication number: 20060260410
    Abstract: According to some embodiments, an apparatus includes a substrate that defines a plane. The apparatus also includes a first conducting plate that is substantially normal to the substrate and a second conducting plate that is (i) substantially normal to the substrate and (ii) deformable in response to a pressure.
    Type: Application
    Filed: July 31, 2006
    Publication date: November 23, 2006
    Inventors: Jeffrey Fortin, Kuna Kishore, Kanakasabapathi Subramanian
  • Publication number: 20060260411
    Abstract: According to some embodiments, an apparatus includes a substrate that defines a plane. The apparatus also includes a first conducting plate that is substantially normal to the substrate and a second conducting plate that is (i) substantially normal to the substrate and (ii) deformable in response to a pressure.
    Type: Application
    Filed: July 31, 2006
    Publication date: November 23, 2006
    Inventors: Jeffrey Fortin, Kuna Kishore, Kanakasabapathi Subramanian
  • Publication number: 20060245933
    Abstract: A microfluidic system and method for its fabrication is disclosed comprising an interposed intermediate layer covering the channel-containing layers, said intermediate layers comprising an integral valve made from the intermediate layer material. A microfluidic system and method is also disclosed for actively pumping a fluid through an integrated layered device incorporating the above-mentioned channels, valves in communication with a chamber, the volume of which can be predictably controlled by interaction between a magnetizable assembly placed on pre-selected sides of the chamber.
    Type: Application
    Filed: May 2, 2005
    Publication date: November 2, 2006
    Inventors: Ernest Balch, Thomas Gorczyca, Radislav Potyrailo, Jeffrey Fortin, Andrew Leach
  • Patent number: 7114397
    Abstract: According to some embodiments, an apparatus includes a substrate that defines a plane. The apparatus also includes a first conducting plate that is substantially normal to the substrate and a second conducting plate that is (i) substantially normal to the substrate and (ii) deformable in response to a pressure.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: October 3, 2006
    Assignee: General Electric Company
    Inventors: Jeffrey Fortin, Kuna Kishore, Kanakasabapathi Subramanian
  • Publication number: 20060170014
    Abstract: A capacitive micromachined ultrasound transducer (cMUT) cell is presented. The cMUT cell includes a lower electrode. Furthermore, the cMUT cell includes a diaphragm disposed adjacent to the lower electrode such that a gap having a first gap width is formed between the diaphragm and the lower electrode, wherein the diaphragm comprises one of a first epitaxial layer or a first polysilicon layer. In addition, a stress reducing material is disposed in the first epitaxial layer.
    Type: Application
    Filed: March 30, 2006
    Publication date: August 3, 2006
    Inventors: Lowell Smith, David Mills, Jeffrey Fortin, Wei-Cheng Tian, John Logan
  • Publication number: 20060137456
    Abstract: A sensor, in accordance with aspects of the present technique, is provided. The sensor comprises a membrane formed of gallium nitride. The membrane is disposed on a substrate, which is wet-etched to form a closed cavity. The membrane exhibits both a capacitive response and a piezo-response to an external stimulus. The sensor further includes a circuit for measuring at least one of the capacitive response or the piezo-response. In certain aspects, the sensor may be operable to measure external stimuli, such as, pressure, force and mechanical vibration.
    Type: Application
    Filed: December 27, 2004
    Publication date: June 29, 2006
    Inventors: Samhita Dasgupta, Jeffrey Fortin, Steven LeBoeuf, Vinayak Tilak, Chayan Mitra, Kanakasabapathi Subramanian, Steven Tysoe
  • Publication number: 20060118920
    Abstract: A method for forming smooth walled, prismatically-profiled through-wafer vias and articles formed through the method. An etch stop material is provided on a wafer, which may be a <110> silicon wafer. A mask material is provided on the etch stop material and patterned in such a way as to lead to the formation of vias that have at least one pair of opposing side walls that run parallel to a <111> plane in the wafer. A wet etchant, such as potassium hydroxide, is used to etch vias in the wafer. The use of a wet etchant leads to the formation of smooth side walls. This method allows an aspect ratio of height versus width of the vias of greater than 75 to 1.
    Type: Application
    Filed: January 23, 2006
    Publication date: June 8, 2006
    Inventors: Kanakasabapathi Subramanian, Jeffrey Fortin, Wei-Cheng Tian
  • Publication number: 20060117839
    Abstract: An apparatus and method are provided for monitoring wear of a component disposed within a fluid stream. The apparatus comprises at least one particle trap configured to capture particles from a fluid stream. The trap comprises a trapping medium having a minimum orifice size. The apparatus further comprises at least one sampler configured to divert at least a portion of the fluid stream through the trapping medium; and at least one sensor system configured to determine at least one flow characteristic in the apparatus. The method comprises flowing fluid from the stream through the apparatus described above, and determining the extent of wear in the component based on flow characteristic data obtained from the sensor system of the apparatus.
    Type: Application
    Filed: December 2, 2004
    Publication date: June 8, 2006
    Inventors: Jeffrey Fortin, Todd Wetzel
  • Publication number: 20060063354
    Abstract: According to some embodiments, a conducting layer is formed on a first wafer. An insulating layer is formed on a second wafer. The insulating layer includes a cavity and a conducting area may be formed in the second wafer proximate to the cavity. The side of the conducting layer opposite the first wafer is bonded to the side of the insulating layer opposite the second wafer. At least some of the first wafer is then removed, without removing at least some of the conducting layer, to form a conducting diaphragm that is substantially parallel to the second wafer. In this way, an amount of capacitance between the diaphragm and the conducting area may be measured to determine an amount of pressure being applied to the diaphragm.
    Type: Application
    Filed: September 20, 2004
    Publication date: March 23, 2006
    Inventors: Jeffrey Fortin, Guanghua Wu, Kanakasabapathi Subramanian
  • Publication number: 20060055048
    Abstract: A method for forming smooth walled, prismatically-profiled through-wafer vias and articles formed through the method. An etch stop material is provided on a wafer, which may be a <110> silicon wafer. A mask material is provided on the etch stop material and patterned in such a way as to lead to the formation of vias that have at least one pair of opposing side walls that run parallel to a <111> plane in the wafer. A wet etchant, such as potassium hydroxide, is used to etch vias in the wafer. The use of a wet etchant leads to the formation of smooth side walls. This method allows an aspect ratio of height versus width of the vias of greater than 75 to 1.
    Type: Application
    Filed: September 13, 2004
    Publication date: March 16, 2006
    Inventors: Kanakasabapathi Subramanian, Jeffrey Fortin, Wei-Cheng Tian