Abstract: One or more Central Processing Complexes (CPC), each with one or more programs being executed, become command initiators by issuing commands requesting an action to be performed by a command responder. The responder is a Structured Electronic Storage (SES) which comprises a coupling facility. The SES receives commands to be executed over a plurality of links interconnecting the CPC's and SES, and returns a response to the program that issued the command. The SES is the focal point for the CPC's to share data, control locks, and manipulate lists or queues. This couples the autonomous CPC's into a System Complex (Sysplex) displaying a single system image. An indicator associated with each of the links is set by SES when it appears to a initiator that problems on the link exist. The set state of any indicator prevents SES from starting execution of any subsequent commands.

Abstract: Apparatus and method insuring that data objects used to maintain state information for shared data at a local central processing complex (CPC) are coherent with respect to state information maintained at a structured external storage facility (SES) over a link is valid. An error detector is attached to the CPC side of the link for detecting errors on the link, and, when an error is detected, setting a error state pending (ESP) latch to indicate that the link has failed and that the shared data in the local data object may be invalid because a message invalidating the data may not have been received by the CPC. In data processing operations, the ESP latch is interrogated by a central processor in the CPC to determine the health of the message path to the SES facility. A local cache vector reflecting the validity of the shared data in the local cache may then be interrogated to determine if the shared data in the local cache is valid.

Abstract: A Structured External Storage (SES) device/processor is connected to two or more DP systems, thereby loosely coupling the systems. The SES is capable of holding data objects of two distinct types (List objects and Cache objects), and communicates commands and command responses with the systems using a message protocol. A support facility within a processor on which a system is executing receives status indications from the SES without interrupting mainline system execution. Within the SES, a serialization mechanism allows more than one command to execute in parallel without loss of data object integrity, or command consistency. A forward completion mechanism sends to systems early notification of completion of certain commands, without permitting results inconsistent with this notification to be obtained by the systems. And a restart mechanism permits interrupted commands to be restarted by the initiating system or, in certain cases, by another system.

Abstract: An application, executing on a first processing element in a MP system without an asymmetric feature, issues an instruction requiring that feature to complete. A program check interruption gives control to interrupt handlers, which create a high-priority, non-preemptable work unit control block and enters the dispatcher to enqueue the work unit on a processor-related queue associated with a second processing element having the asymmetric feature. When the dispatcher executes in the second processing element, it executes the non-preemptable work unit, which transfers control to the application at the point of interruption. Subsequently the application has only whatever processor affinity obtained prior to the program check.

Abstract: Page management mechanisms provide candidates for page stealing and prefetching from a main storage data cache of shared data when the jobs sharing the data are accessing it in a sequential manner. Pages are stolen behind the first reader in the cache, and thereafter at locations least likely to be soon re-referenced by trailing readers. A "clustering" of readers may be promoted to reduce I/O contention. Prefetching is carried out so that the pages most likely to be soon referenced by one of the readers are brought into the cache.

Abstract: A method for dynamically assigning and removing task affinity for a resource is disclosed and claimed. A first interrupt handler recognizes a special task interrupt condition which is generated by the hardware. The interrupt condition is generated because a task attempted to execute a special instruction and either a special resource is attached to the central processing unit which issued the special instruction, or a special resource is not attached to the issuing central processing unit, but could be attached to another central processing unit in a central electronic complex. The first interrupt handler then passes control to a second interrupt handler which determines if execution of the current task can continue. If it can, the second interrupt handler creates or reestablishes a special environment and the task is dispatched (either for the first time or again) with a special dynamic affinity to only those central processing units in the central electronic complex that have a special resource attached.

Abstract: A method for manufacturing compound semiconductor devices includes a step of forming a first oxidized film on a GaAs body and heating it at a high temperature. A second oxidized film is thereafter formed on the body which includes the first oxidized film so as to change it properties, for example, to be easily etched with an etchant.