Patents by Inventor Jeffrey G. Loewecke

Jeffrey G. Loewecke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090166564
    Abstract: Methods are presented to monitor the performance of an ion implanter such as the E500. Ion implantation typically involves physical processes performed on a wafer such as rotation, tilt, and twist. These methods generate particulate contaminants (PCs) that affect the kill rate of the semiconductor devices on the wafer. Variations in tilt angle also compromise dose accuracy. Presently, methods for testing for PCs and implant dose accuracy do not simulate actual manufacturing conditions. This invention discloses methods to test PC buildup using multiple wafers that are subjected to rotation, twist, tilt, and combinations thereof. Additionally, methods to test dose accuracy are presented, involving implanting a monitor wafer at an angle where the crystalline channel is aligned with the ion beam. Measuring sheet resistance as a function of tilt angle at this point ensures accurate tilt-angle calibration of the ion implanter.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 2, 2009
    Inventors: BENJAMIN G. MOSER, John E. Wiggins, Jeffrey G. Loewecke, Alan L. Kordick, Richard L. Guldi
  • Patent number: 7208330
    Abstract: The present invention provides a method for placing a dopant in a substrate and a method for manufacturing an integrated circuit. The method for placing a dopant in a substrate, among other steps, includes providing a substrate (340) and implanting a dopant within the substrate (340) using an implant (370), the implant (370) moving at varying speeds across the substrate (340) to provide different concentrations of the dopant within the substrate (340).
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: April 24, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Sean M. Collins, Jeffrey G. Loewecke, James D. Bernstein
  • Patent number: 7153711
    Abstract: The present invention provides a method for manufacturing semiconductor devices, a method for manufacturing an integrated circuit, and a method for improving a drive current for semiconductor devices on a wafer-by-wafer basis. The method for manufacturing semiconductor devices, among other elements, includes patterning gate structures on a substrate (220), each of the gate structures having a profile associated therewith, and obtaining information representative of the profiles of the gate structures (240). In accordance with the present invention the information may then be fed forward to alter a manufacturing parameter associated with a drive current of the semiconductor devices (250).
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: December 26, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: James B. Friedmann, Kaneez E-shaher Banu, Yuqing Xu, Jeffrey G. Loewecke, James D. Vaughan