Abstract: A storage system includes a magnetic write head, a magnetic storage medium, a channel circuit comprising a write data output, wherein the channel circuit is operable to process write data to be recorded on the magnetic storage medium by the magnetic write head, and a preamplifier operable to receive the write data from the channel circuit, wherein the preamplifier comprises a number of register pages configured to store pattern dependent write current characteristics for a variety of magnet lengths, and wherein the preamplifier is operable to retrieve the write current characteristics based on magnet lengths and to record data bits on the magnetic storage medium using the write current characteristics.

Abstract: A storage system includes a magnetic write head, a magnetic storage medium, a channel circuit comprising a write data output, wherein the channel circuit is operable to process write data to be recorded on the magnetic storage medium by the magnetic write head, and a preamplifier operable to receive the write data from the channel circuit, wherein the preamplifier comprises a number of register pages configured to store pattern dependent write current characteristics for a variety of magnet lengths, and wherein the preamplifier is operable to retrieve the write current characteristics based on magnet lengths and to record data bits on the magnetic storage medium using the write current characteristics.

Abstract: An apparatus for two-dimensional magnetic recording includes a storage medium, an array of magnetoresistive read heads disposed adjacent the storage medium and spaced to read a data track, a number of leads connected to the array of magnetoresistive read heads, and number of bias circuits connected to the array of read heads by the leads. The bias circuits can be configured to independently bias each of the array of read heads with the array of read heads connected in series or in parallel.

Abstract: An apparatus for two-dimensional magnetic recording includes an array reader with a number of magnetoresistive read sensors configured to read data from a storage medium. The magnetoresistive read sensors have a number of connection terminals, with at least one of the connection terminals being shared by more than one of the magnetoresistive read sensors. The apparatus also includes a number of low-noise amplifiers connected to the connection terminals, each configured to amplify a differential signal from a different one of the magnetoresistive read sensors. The apparatus also includes a number of impedance balancing networks connected to a subset of the connection terminals.

Abstract: An apparatus for correcting crosstalk in an array reader magnetic recording system includes an array reader comprising a number of read heads operable to read data from a magnetic storage medium, a preamplifier configured to amplify the signals from the read heads, and a crosstalk correction circuit configured to reduce crosstalk between signals from the read heads.

Abstract: An apparatus for two-dimensional magnetic recording includes a storage medium, an array of magnetoresistive read heads disposed adjacent the storage medium and spaced to read a data track, wherein the array of magnetoresistive read heads share a common terminal, a number of leads connected to the array of magnetoresistive read heads, with one lead for each of the magnetoresistive read heads, plus a common lead connected to the common terminal, wherein each of the plurality of leads other than the at least one common lead are referenced to the at least one common lead, and a preamplifier connected to the array of magnetoresistive read heads by the plurality of leads and operable to perform pseudo-differential sensing or single-ended sensing of signals from the array of magnetoresistive read heads.

Abstract: A hard disk drive or other storage device comprises a storage medium, a write head configured to write data to the storage medium, and control circuitry coupled to the write head. The control circuitry comprises a write driver configured to generate a write signal comprising a write pulse, and reflection compensation circuitry coupled to or otherwise associated with the write driver and configured to provide one or more reflection compensation pulses in the write pulse.

Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a write head configured to write data to the disk, and control circuitry coupled to the write head. The control circuitry comprises a write driver and degauss circuitry associated with the write driver. The degauss circuitry is configured to generate a chirped degauss signal to be applied to the write head by the write driver. The degauss circuitry comprises a ramp generator configured to generate a ramp signal for controlling a frequency of at least a portion of a waveform of the chirped degauss signal. The ramp signal generated by the ramp generator may comprise a current ramp that is applied to a control input of a current controlled oscillator of the degauss circuitry.

Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a read/write head configured to read data from and write data to the disk, and control circuitry coupled to or otherwise associated with the read/write head. The control circuitry comprises a write driver configured to generate a write signal for data to be written to the storage disk, and a multiple-slope transition controller associated with the write driver and configured to control a data transition in the write signal such that the data transition comprises at least two different segments each having a different slope, with the transition controller comprising separate slope control mechanisms for each of the segments. By way of example, the data transition may comprise a dual-slope transition having first and second segments arranged sequentially between a start point and an end point of the data transition.

Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a write head configured to write data to the disk, and control circuitry coupled to the write head. The control circuitry comprises a write driver and degauss circuitry associated with the write driver. The degauss circuitry is configured to generate a chirped degauss signal to be applied to the write head by the write driver. The degauss circuitry comprises a ramp generator configured to generate a ramp signal for controlling a frequency of at least a portion of a waveform of the chirped degauss signal. The ramp signal generated by the ramp generator may comprise a current ramp that is applied to a control input of a current controlled oscillator of the degauss circuitry.

Abstract: Structures and method for reducing junction leakage in semiconductor devices. The die can include a substrate having a cut edge, a first region of first conductivity type within the substrate and a region of a second conductivity type within the substrate and in contact with the first region forming a junction. At least one semiconductor device is on the substrate. A second region of the first conductivity type is between the plurality of semiconductor devices and the cut edge within the region of the second conductivity type, and extending to the junction. The second region of the first conductivity type can isolate the at least one semiconductor device from leakage pathways created by saw damage at the junction along the cut edge.

Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a read/write head configured to read data from and write data to the disk, and control circuitry coupled to or otherwise associated with the read/write head. The control circuitry comprises a write driver configured to generate a write signal for data to be written to the storage disk, and a multiple-slope transition controller associated with the write driver and configured to control a data transition in the write signal such that the data transition comprises at least two different segments each having a different slope, with the transition controller comprising separate slope control mechanisms for each of the segments. By way of example, the data transition may comprise a dual-slope transition having first and second segments arranged sequentially between a start point and an end point of the data transition.

Abstract: A voltage regulator, a method of regulating voltage and an IC including a voltage regulator. In one embodiment, the voltage regulator includes: (1) a DC precision amplifier configured to generate a DC precision signal based on a reference voltage and a regulated output of the voltage regulator and (2) a response amplifier, coupled in parallel with the DC precision amplifier, configured to generate an error signal based on the reference voltage and the regulated output, the response amplifier further configured to generate the regulated output based on a regulating signal comprised of the error signal and the DC precision signal. The DC precision amplifier may be a CMOS amplifier and the response amplifier may be a NPN amplifier.

Abstract: Electronic circuitry and methods are disclosed for monitoring a portion of a write driver, for example, a steady state value of a write driver of a hard disk drive preamplifier. Based on a result of the monitoring, a condition, such as a fault, can be detected in the write driver. For example, apparatus for monitoring a write driver of a disk drive system comprises a comparator circuit coupled to an output of the write driver and configured to compare a value present at the output of the write driver with a reference value such that at least one condition associated with the write driver is detectable as a result of the comparison of the write driver output value and the reference value.

Abstract: Electronic circuitry and methods are disclosed for monitoring a portion of a write driver, for example, a steady state value of a write driver of a hard disk drive preamplifier. Based on a result of the monitoring, a condition, such as a fault, can be detected in the write driver. For example, apparatus for monitoring a write driver of a disk drive system comprises a comparator circuit coupled to an output of the write driver and configured to compare a value present at the output of the write driver with a reference value such that at least one condition associated with the write driver is detectable as a result of the comparison of the write driver output value and the reference value.

Abstract: Structures and method for reducing junction leakage in semiconductor devices. The die can include a substrate having a cut edge, a first region of first conductivity type within the substrate and a region of a second conductivity type within the substrate and in contact with the first region forming a junction. At least one semiconductor device is on the substrate. A second region of the first conductivity type is between the plurality of semiconductor devices and the cut edge within the region of the second conductivity type, and extending to the junction. The second region of the first conductivity type can isolate the at least one semiconductor device from leakage pathways created by saw damage at the junction along the cut edge.

Abstract: A recording system employing a magneto-resistive (MR) element senses a resistance value of the MR element and generates one or more MR resistance (MRR) signal values based on the sensed MR element resistance value. The MRR signal values might be, for example, current or voltage values proportional or inversely proportional to the MR element resistance value. The MRR signal values might be employed to control one or more of: i) a unity gain bandwidth of a bias loop for the MR element, ii) an MR read head preamplifier low corner frequency, and iii) a slew rate across the MR element.

Abstract: A voltage regulator, a method of regulating voltage and an IC including a voltage regulator. In one embodiment, the voltage regulator includes: (1) a DC precision amplifier configured to generate a DC precision signal based on a reference voltage and a regulated output of the voltage regulator and (2) a response amplifier, coupled in parallel with the DC precision amplifier, configured to generate an error signal based on the reference voltage and the regulated output, the response amplifier further configured to generate the regulated output based on a regulating signal comprised of the error signal and the DC precision signal. The DC precision amplifier may be a CMOS amplifier and the response amplifier may be a NPN amplifier.

Abstract: An apparatus and method for determining a head parameter value (e.g., head resistance) of a resistive head. A test head current is supplied to the head during a head parameter measurement interval using the same current sources that supply a bias current to the head during an operating (read operation) interval. The determined head parameter value is latched for use in setting the control loop gain for a control loop that controls the current sources during the operating interval.

Abstract: An apparatus and method for determining a resistance of a magneto-resistive head. A current drawn by the head, in response to a fixed bias voltage across the head, is converted to a zero temperature coefficient current such that when supplied to a resistor connected to an input terminal of a comparator the effects of variations in the resistance value are avoided. An output signal of the comparator indicates the resistance of the magneto-resistive head.