Patents by Inventor Jeffrey Glenn Libby

Jeffrey Glenn Libby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9817773
    Abstract: A device includes an input processing unit and an output processing unit. The input processing unit dispatches first data to one of a group of processing engines, records an identity of the one processing engine in a location in a first memory, reserves one or more corresponding locations in a second memory, causes the first data to be processed by the one processing engine, and stores the processed first data in one of the locations in the second memory. The output processing unit receives second data, assigns an entry address corresponding to a location in an output memory to the second data, transfers the second data and the entry address to one of a group of second processing engines, causes the second data to be processed by the second processing engine, and stores the processed second data to the location in the output memory.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: November 14, 2017
    Assignee: Juniper Networks, Inc.
    Inventors: Raymond Marcelino Manese Lim, Stefan Dyckerhoff, Jeffrey Glenn Libby, Teshager Tesfaye
  • Publication number: 20160019170
    Abstract: A device includes an input processing unit and an output processing unit. The input processing unit dispatches first data to one of a group of processing engines, records an identity of the one processing engine in a location in a first memory, reserves one or more corresponding locations in a second memory, causes the first data to be processed by the one processing engine, and stores the processed first data in one of the locations in the second memory. The output processing unit receives second data, assigns an entry address corresponding to a location in an output memory to the second data, transfers the second data and the entry address to one of a group of second processing engines, causes the second data to be processed by the second processing engine, and stores the processed second data to the location in the output memory.
    Type: Application
    Filed: September 30, 2015
    Publication date: January 21, 2016
    Inventors: Raymond Marcelino Manese LIM, Stefan DYCKERHOFF, Jeffrey Glenn LIBBY, Teshager TESFAYE
  • Patent number: 9178840
    Abstract: A device includes an input processing unit and an output processing unit. The input processing unit dispatches first data to one of a group of processing engines, records an identity of the one processing engine in a location in a first memory, reserves one or more corresponding locations in a second memory, causes the first data to be processed by the one processing engine, and stores the processed first data in one of the locations in the second memory. The output processing unit receives second data, assigns an entry address corresponding to a location in an output memory to the second data, transfers the second data and the entry address to one of a group of second processing engines, causes the second data to be processed by the second processing engine, and stores the processed second data to the location in the output memory.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: November 3, 2015
    Assignee: Juniper Networks, Inc.
    Inventors: Raymond Marcelino Manese Lim, Stefan Dyckerhoff, Jeffrey Glenn Libby, Teshager Tesfaye
  • Patent number: 8397233
    Abstract: A device includes an input processing unit and an output processing unit. The input processing unit dispatches first data to one of a group of processing engines, records an identity of the one processing engine in a location in a first memory, reserves one or more corresponding locations in a second memory, causes the first data to be processed by the one processing engine, and stores the processed first data in one of the locations in the second memory. The output processing unit receives second data, assigns an entry address corresponding to a location in an output memory to the second data, transfers the second data and the entry address to one of a group of second processing engines, causes the second data to be processed by the second processing engine, and stores the processed second data to the location in the output memory.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: March 12, 2013
    Assignee: Juniper Networks, Inc.
    Inventors: Raymond Marcelino Manese Lim, Stefan Dyckerhoff, Jeffrey Glenn Libby, Teshager Tesfaye
  • Publication number: 20110235643
    Abstract: A network device for performing redirect checking includes an input device and processing logic. The input device receives a data packet on a first one of a number of interfaces. The data packet includes source and destination addresses. The processing logic assigns an incoming interface to the data packet and generates forwarding information identifying a next hop for the data packet. The processing logic also identifies an outgoing interface based on the next hop and determines whether the incoming interface index is equal to the outgoing interface index. The processing logic also determines whether the data packet originated from a station that is part of the same subnet as the next hop. When both of these conditions are met, the processing logic generates a redirect message.
    Type: Application
    Filed: June 10, 2011
    Publication date: September 29, 2011
    Applicant: JUNIPER NETWORKS, INC.
    Inventors: Raymond Marcelino Manese LIM, Dennis C. Ferguson, Jeffrey Glenn Libby
  • Patent number: 7983278
    Abstract: A network device includes an input device configured to receive a data packet, where the input device includes a number of interfaces and the data packet includes a source address and a destination address. The network device also includes processing logic configured to generate forwarding information identifying a next hop for the data packet and determine whether an interface on which the data packet was received is a same interface on which the data packet is to be forwarded to the next hop. The processing logic is also configured to determine whether the data packet originated from a device that is part of a same subnet as the next hop.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: July 19, 2011
    Assignee: Juniper Networks, Inc.
    Inventors: Raymond Marcelino Manese Lim, Dennis C. Ferguson, Jeffrey Glenn Libby
  • Patent number: 7292529
    Abstract: A system for multicasting a packet of data to a single data stream is provided. The system may determine a size of the packet and may send a single copy of the packet if the size of the packet exceeds a threshold value. A number of copies of the packet yet to be multicast may be ascertained if the size of the packet of data does not exceed the threshold value. Copies of the packet may be transmitted based on the number of copies of the packet yet to be multicast.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: November 6, 2007
    Assignee: Juniper Networks, Inc.
    Inventors: Debashis Basu, Avanindra Godbole, Raymond M. Lim, Jeffrey Glenn Libby
  • Patent number: 7240347
    Abstract: A device includes an input processing unit and an output processing unit. The input processing unit dispatches first data to one of a group of processing engines, records an identity of the one processing engine in a location in a first memory, reserves one or more corresponding locations in a second memory, causes the first data to be processed by the one processing engine, and stores the processed first data in one of the locations in the second memory. The output processing unit receives second data, assigns an entry address corresponding to a location in an output memory to the second data, transfers the second data and the entry address to one of a group of second processing engines, causes the second data to be processed by the second processing engine, and stores the processed second data to the location in the output memory.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: July 3, 2007
    Assignee: Juniper Networks, Inc.
    Inventors: Raymond Marcelino Manese Lim, Stefan Dyckerhoff, Jeffrey Glenn Libby, Teshager Tesfaye
  • Patent number: 7082134
    Abstract: A network device for performing redirect checking includes an input device and processing logic. The input device receives a data packet on a first one of a number of interfaces. The data packet includes source and destination addresses. The processing logic assigns an incoming interface to the data packet and generates forwarding information identifying a next hop for the data packet. The processing logic also identifies an outgoing interface based on the next hop and determines whether the incoming interface index is equal to the outgoing interface index. The processing logic also determines whether the data packet originated from a station that is part of the same subnet as the next hop. When both of these conditions are met, the processing logic generates a redirect message.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: July 25, 2006
    Assignee: Juniper Networks, Inc.
    Inventors: Raymond Marcelino Manese Lim, Dennis C. Ferguson, Jeffrey Glenn Libby