Patents by Inventor Jeffrey Hall

Jeffrey Hall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SOYBEAN VARIETY D4696658
    Publication number: 20090019603
    Abstract: The invention relates to the soybean variety designated D4696658. Provided by the invention are the seeds, plants and derivatives of the soybean variety D4696658. Also provided by the invention are tissue cultures of the soybean variety D4696658 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety D4696658 with itself or another soybean variety and plants produced by such methods.
    Type: Application
    Filed: July 12, 2007
    Publication date: January 15, 2009
    Inventors: Thomas L. Floyd, Jeffrey Hall
  • SOYBEAN VARIETY D4021792
    Publication number: 20090013429
    Abstract: The invention relates to the soybean variety designated D4021792. Provided by the invention are the seeds, plants and derivatives of the soybean variety D4021792. Also provided by the invention are tissue cultures of the soybean variety D4021792 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety D4021792 with itself or another soybean variety and plants produced by such methods.
    Type: Application
    Filed: July 3, 2007
    Publication date: January 8, 2009
    Inventors: Thomas L. Floyd, Jeffrey Hall
  • SOYBEAN VARIETY D4902530
    Publication number: 20090013428
    Abstract: The invention relates to the soybean variety designated D4902530. Provided by the invention are the seeds, plants and derivatives of the soybean variety D4902530. Also provided by the invention are tissue cultures of the soybean variety D4902530 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety D4902530 with itself or another soybean variety and plants produced by such methods.
    Type: Application
    Filed: July 3, 2007
    Publication date: January 8, 2009
    Inventors: Thomas L. Floyd, Jeffrey Hall
  • SOYBEAN VARIETY D4328762
    Publication number: 20090007288
    Abstract: The invention relates to the soybean variety designated D4328762. Provided by the invention are the seeds, plants and derivatives of the soybean variety D4328762. Also provided by the invention are tissue cultures of the soybean variety D4328762 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety D4328762 with itself or another soybean variety and plants produced by such methods.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 1, 2009
    Inventors: Thomas L. Floyd, Jeffrey Hall
  • SOYBEAN VARIETY D4483789
    Publication number: 20090007287
    Abstract: The invention relates to the soybean variety designated D4483789. Provided by the invention are the seeds, plants and derivatives of the soybean variety D4483789. Also provided by the invention are tissue cultures of the soybean variety D4483789 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety D4483789 with itself or another soybean variety and plants produced by such methods.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 1, 2009
    Inventors: Thomas L. Floyd, Jeffrey Hall
  • Controlling average power to a fuser
    Patent number: 7412185
    Abstract: Disclosed are embodiments for controlling one or more subsystems of an imaging system to manage average power to a fuser.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: August 12, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey Hall, Michael Martin, Bartley Mark Hirst
  • Ball grid array assignment
    Patent number: 7405946
    Abstract: A pattern of contacts that includes high speed transmitter contacts disposed in a first portion of the pattern, where the high speed transmitter contacts are disposed in first ordered channels of adjacent transmitter differential pairs. High speed receiver contacts are disposed in a second portion of the pattern, where the first portion of the pattern is not interspersed with the second portion of the pattern, and the high speed receiver contacts are disposed in first ordered channels of adjacent receiver differential pairs. At least one unbroken line of other contacts is disposed between the first portion of the pattern and the second portion of the pattern, where the other contacts do not contain any high speed transmitter contacts and high speed receiver contacts. Low speed IO contacts are disposed in a third portion of the pattern.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: July 29, 2008
    Assignee: LSI Logic Corporation
    Inventors: Jeffrey A. Hall, Farshad Ghahghahi
  • Biatrial pacing optimization for biventricular pacing
    Patent number: 7389141
    Abstract: A method or system for computing and/or setting optimal cardiac resynchronization pacing parameters is presented. Among the parameters which may be optimized in this manner are an atrio-ventricular delay interval, an inter-atrial interval and a biventricular offset interval.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: June 17, 2008
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: Jeffrey A. Hall, Jiang Ding
  • METHOD AND APPARATUS FOR TRANSPORTING DETERMINISTIC TRAFFIC IN A GIGABIT PASSIVE OPTICAL NETWORK
    Publication number: 20070297446
    Abstract: A system and method are disclosed for transporting deterministic traffic in a gigabit passive optical network. A system that incorporates teachings of the present disclosure may include, for example, an Optical Line Termination (OLT) for exchanging data traffic in a Gigabit Passive Optical Network (GPON) having a controller programmed to generate a timeslot schedule for transport of a desired bandwidth of CBR data traffic by selecting one or more timeslots from periodic frame clusters operating according to a GPON Transmission Convergence (GTC) protocol. Additional embodiments are disclosed.
    Type: Application
    Filed: June 23, 2006
    Publication date: December 27, 2007
    Applicant: SBC KNOWLEDGE VENTURES, L.P.
    Inventors: JOHN SIWKO, ANDREW JEFFREY HALL
  • Scaling of functional assignments in packages
    Patent number: 7298036
    Abstract: A family of package substrates adapted to receive a family of integrated circuits having different sizes and provide electrical connections between the integrated circuits and a circuit board. Each package substrate in the family includes a package substrate having a die side and a circuit board side. The package substrate has a size that is consistent for all of the package substrates in the family of package substrates. The die side has integrated circuit contacts disposed in a pattern designed to make electrical connections to a given integrated circuit in the family of integrated circuits for which the package substrate is designed, as defined by locations of contacts on the given integrated circuit. The circuit board side has circuit board contacts disposed in a pattern and with functional assignments that are consistent for all of the package substrates in the family of package substrates.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: November 20, 2007
    Assignee: LSI Corporation
    Inventors: Leah M. Miller, Jeffrey A. Hall
  • DEVICE FOR AVOIDING PARASITIC CAPACITANCE IN AN INTEGRATED CIRCUIT PACKAGE
    Publication number: 20070222084
    Abstract: An integrated circuit package substrate includes a first and an additional electrically conductive layer separated from each other by an electrically insulating layer, a contact pad formed in the first electrically conductive layer for making a direct connection between the integrated circuit package substrate and a printed circuit board, and a cutout formed in the additional electrically conductive layer wherein the cutout encloses an area that completely surrounds the contact pad for avoiding parasitic capacitance between the additional electrically conductive layer and the printed circuit board.
    Type: Application
    Filed: March 22, 2006
    Publication date: September 27, 2007
    Inventors: Jeffrey Hall, Shawn Nikoukary, Amar Amin, Michael Jenkins
  • Scaling of functional assignments in packages
    Publication number: 20070114644
    Abstract: A family of package substrates adapted to receive a family of integrated circuits having different sizes and provide electrical connections between the integrated circuits and a circuit board. Each package substrate in the family includes a package substrate having a die side and a circuit board side. The package substrate has a size that is consistent for all of the package substrates in the family of package substrates. The die side has integrated circuit contacts disposed in a pattern designed to make electrical connections to a given integrated circuit in the family of integrated circuits for which the package substrate is designed, as defined by locations of contacts on the given integrated circuit. The circuit board side has circuit board contacts disposed in a pattern and with functional assignments that are consistent for all of the package substrates in the family of package substrates.
    Type: Application
    Filed: November 18, 2005
    Publication date: May 24, 2007
    Inventors: Leah Miller, Jeffrey Hall
  • Soybean variety 0037209
    Patent number: 7193137
    Abstract: The instant invention relates to the novel soybean variety designated 0037209. Provided by the invention are the seeds, plants and derivatives of the soybean variety 0037209. Also provided by the invention are tissue cultures of the soybean variety 0037209 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety 0037209 with itself or another soybean variety and plants produced by such methods.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: March 20, 2007
    Assignee: Monsanto Technology, L.L.C.
    Inventors: Thomas L. Floyd, Jeffrey Hall
  • Device for minimizing differential pair length mismatch and impedance discontinuities in an integrated circuit package design
    Patent number: 7180011
    Abstract: A method of routing an integrated circuit package design includes steps of receiving as input at least a portion of an integrated circuit design including a differential pair of two electrical conductors, calculating a value of length mismatch between the two electrical conductors, calculating an added trace length to compensate for an impedance discontinuity of a shorter one of the two electrical conductors, and extending the shorter one of the two electrical conductors by routing the added trace length entirely inside an area surrounded by a contact pad that electrically terminates the shorter one of the two electrical conductors. The routing for the differential pair with the added trace length is generated as output in the integrated circuit design.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: February 20, 2007
    Assignee: LSI Logic Corporation
    Inventors: Jeffrey Hall, Shawn Nikoukary
  • Offset via on pad
    Publication number: 20060284310
    Abstract: A printed circuit board with an electrically conductive bonding pad disposed on an outer surface of the printed circuit board. The bonding pad has a bonding pad perimeter at immediately bounding edges of the bonding pad. An electrically conductive via directly electrically contacts the bonding pad, and is disposed within the printed circuit board relative to the bonding pad. The via has a via perimeter at immediately bounding edges of the via. The via perimeter overlaps the pad perimeter such that a portion of the via perimeter is within the pad perimeter and a portion of the via perimeter is outside the pad perimeter. In various embodiments, the bonding pad is a ball bonding pad.
    Type: Application
    Filed: June 15, 2005
    Publication date: December 21, 2006
    Inventors: Jeffrey Hall, Shahram Nikoukary
  • RECORDABLE MACROS FOR PACEMAKER FOLLOW-UP
    Publication number: 20060287692
    Abstract: A device and method for programming an implantable pulse generator. In one embodiment, commands are entered designating implantable pulse generator programming variables into programmer memory. At least some of the commands are transformed into an executable macro. The macro is stored in the programmer memory. The macro is executed to transmit the programming variables to the implantable pulse generator.
    Type: Application
    Filed: August 25, 2006
    Publication date: December 21, 2006
    Inventors: Jeffrey Hall, G. Kay
  • Recordable macros for pacemaker follow-up
    Patent number: 7136707
    Abstract: A device and method for programming an implantable pulse generator. In one embodiment, commands are entered designating implantable pulse generator programming variables into programmer memory. At least some of the commands are transformed into an executable macro. The macro is stored in the programmer memory. The macro is executed to transmit the programming variables to the implantable pulse generator.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: November 14, 2006
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: Jeffrey A. Hall, G. Neal Kay
  • Ball grid array assignment
    Publication number: 20060249302
    Abstract: A pattern of contacts that includes high speed transmitter contacts disposed in a first portion of the pattern, where the high speed transmitter contacts are disposed in first ordered channels of adjacent transmitter differential pairs. High speed receiver contacts are disposed in a second portion of the pattern, where the first portion of the pattern is not interspersed with the second portion of the pattern, and the high speed receiver contacts are disposed in first ordered channels of adjacent receiver differential pairs. At least one unbroken line of other contacts is disposed between the first portion of the pattern and the second portion of the pattern, where the other contacts do not contain any high speed transmitter contacts and high speed receiver contacts. Low speed IO contacts are disposed in a third portion of the pattern.
    Type: Application
    Filed: May 5, 2005
    Publication date: November 9, 2006
    Inventors: Jeffrey Hall, Farshad Ghahghahi
  • Automated image processing system and method
    Publication number: 20060250666
    Abstract: A stand-alone image automated processing system and method. The method comprises the steps of: accessing at least one image in digital form; writing the at least one digital image to a photosensitive medium to generate an at least one exposed film image; mechanically transporting the at least one exposed film image to a chemical processor; and automatically chemically processing the at least one exposed film image to generate a film output image.
    Type: Application
    Filed: March 14, 2003
    Publication date: November 9, 2006
    Inventors: Ronald Wexler, Jeffrey Hall, James Warnick, Kenneth Parulski
  • Changing an amount of power drawn from a power source
    Publication number: 20060182458
    Abstract: Disclosed are embodiments of an imaging system.
    Type: Application
    Filed: February 16, 2005
    Publication date: August 17, 2006
    Inventors: Jeffrey Hall, Michael Martin, Bartley Hirst