Patents by Inventor Jeffrey I. Robinson

Jeffrey I. Robinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6615279
    Abstract: An object oriented processor array includes a library of functional objects which are instantiated by commands through a system object and which communicate via a high level language. According to the invention, instantiated objects communicate directly with a script server which is programmed to react to data events generated by instantiated objects. One script server may serve several object oriented processor arrays, or an object oriented processor array may have a local script server. The object oriented processor array may be embodied in hardware, software, or a combination of hardware and software. Each functional object may include a discrete hardware processor or may be embodied as a virtual processor within the operations of a single processor. According to one embodiment, the object oriented processor array is formed on a single chip or on a single processor chip and an associated memory chip.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: September 2, 2003
    Assignee: IQ Systems
    Inventor: Jeffrey I. Robinson
  • Patent number: 6567837
    Abstract: An object oriented processor array includes a library of functional objects which are instantiated by commands through a system object and which communicate via a high level language. The object oriented processor array may be embodied in hardware, software, or a combination of hardware and software. Each functional object may include a discrete hardware processor or may be embodied as a virtual processor within the operations of a single processor. According to one embodiment, the object oriented processor array is formed on a single chip or on a single processor chip and an associated memory chip. When several objects are instantiated on a single chip, pins may be assigned to each object via a high level command language. Methods and apparatus for allocating memory to instantiated objects are disclosed. Methods and apparatus for scheduling when several virtual processors are embodied within the operations of a single microprocessor are also disclosed.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: May 20, 2003
    Assignee: IQ Systems
    Inventor: Jeffrey I. Robinson
  • Patent number: 6424990
    Abstract: A distributed processing system includes a plurality of cells where each cell processes information in response to a type of event, and cells communicate with each other according to an (asynchronous) event-reaction protocol. Cells maintain mailing lists which are associated with events and which indicate the address(es) of cell(s) to whom a message is sent in response to the event. According to one embodiment, at least one cell is provided with the ability to read, write, and delete any address on any mailing list in the system. According to another embodiment, at least one cell keeps a list of events (subscription list) that are deemed important by the user where it is the cell's responsibility to insure that it remains subscribed to the mailing lists associated with these events. According to another embodiment, at least one cell serves more than one mailing list and preferably keeps a list of the mailing lists it serves.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: July 23, 2002
    Inventor: Jeffrey I. Robinson
  • Patent number: 6408067
    Abstract: The apparatus of the invention (a) monitors a subscriber line for the presence of DTMF tones, (b) intercepts DTMF tones by transmitting a set of DTMF harmonics onto the subscriber line, (c) detects the intercepted DTMF tones and records them or the digits they represent, (d) analyzes the intercepted digits to determine whether a long distance number has been dialed, and (e) if a long distance call has been dialed, transmits onto the subscriber line a DTMF signal which includes the intercepted DTMF signal plus a service provider access code DTMF signal inserted before it. According to a presently preferred embodiment, the apparatus includes a voltage sensor which detects a drop in voltage whenever a phone connected to the same subscriber line as the apparatus goes off-hook. The voltage detector turns the apparatus “ON” when an off-hook condition is detected.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: June 18, 2002
    Assignee: IQ Systems, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 6285751
    Abstract: A distributed processing system includes a plurality of cells where each cell processes information in response to a type of event, and cells communicate with each other according to an (asynchronous) event-reaction protocol. According to one embodiment, each cell is responsive to a single type of event and includes a plurality of scripts which are executed upon the occurrence of an event of the appropriate type. At least some scripts include directions to send information to one or more scripts in another cell. According to another embodiment, some cells communicate with other cells according to a (synchronous) streaming protocol and other cells communicate according to an (asynchronous) event-reaction protocol. The cells communicate with each other via a shared memory or via a communications bus. The communications protocol utilized by the cells enables the use of virtually any networking medium. Thus, cells may reside in the same chip or may be separated from each other by thousands of miles.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: September 4, 2001
    Assignee: iQ Net Solutions, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 6275847
    Abstract: A distributed processing system includes a plurality of cells where each cell processes information in response to a type of event, and cells communicate with each other according to an (asynchronous) event-reaction protocol. According to one embodiment, each cell is responsive to a single type of event and includes a plurality of scripts which are executed upon the occurrence of an event of the appropriate type. At least some scripts include directions to send information to one or more scripts in another cell. According to another embodiment, some cells communicate with other cells according to a (synchronous) streaming protocol and other cells communicate according to an (asynchronous) event-reaction protocol. The cells communicate with each other via a shared memory or via a communications bus. The communications protocol utilized by the cells enables the use of virtually any networking medium. Thus, cells may reside in the same chip or may be separated from each other by thousands of miles.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: August 14, 2001
    Assignee: iQ Net Solutions, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 6272525
    Abstract: A distributed processing system includes a plurality of cells where each cell processes information in response to a type of event, and cells communicate with each other according to an (asynchronous) event-reaction protocol. According to one embodiment, each cell is responsive to a single type of event and includes a plurality of scripts which are executed upon the occurrence of an event of the appropriate type. At least some scripts include directions to send information to one or more scripts in another cell. According to another embodiment, some cells communicate with other cells according to a (synchronous) streaming protocol and other cells communicate according to an (asynchronous) event-reaction protocol. The cells communicate with each other via a shared memory or via a communications bus. The communications protocol utilized by the cells enables the use of virtually any networking medium. Thus, cells may reside in the same chip or may be separated from each other by thousands of miles.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: August 7, 2001
    Assignee: iQ Net Solutions, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 6272524
    Abstract: A distributed processing system includes a plurality of cells where each cell processes information in response to a type of event, and cells communicate with each other according to an (asynchronous) event-reaction protocol. According to one embodiment, each cell is responsive to a single type of event and includes a plurality of scripts which are executed upon the occurrence of an event of the appropriate type. At least some scripts include directions to send information to one or more scripts in another cell. According to another embodiment, some cells communicate with other cells according to a (synchronous) streaming protocol and other cells communicate according to an (asynchronous) event-reaction protocol. The cells communicate with each other via a shared memory or via a communications bus. The communications protocol utilized by the cells enables the use of virtually any networking medium. Thus, cells may reside in the same chip or may be separated from each other by thousands of miles.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: August 7, 2001
    Assignee: iQ NetSolutions Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 6272526
    Abstract: A distributed processing system includes a plurality of cells where each cell processes information in response to a type of event, and cells communicate with each other according to an (asynchronous) event-reaction protocol. According to one embodiment, each cell is responsive to a single type of event and includes a plurality of scripts which are executed upon the occurrence of an event of the appropriate type. At least some scripts include directions to send information to one or more scripts in another cell. According to another embodiment, some cells communicate with other cells according to a (synchronous) streaming protocol and other cells communicate according to an (asynchronous) event-reaction protocol. The cells communicate with each other via a shared memory or via a communications bus. The communications protocol utilized by the cells enables the use of virtually any networking medium. Thus, cells may reside in the same chip or may be separated from each other by thousands of miles.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: August 7, 2001
    Assignee: iQ NetSolutions, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 6272527
    Abstract: A distributed processing system includes a plurality of cells where each cell processes information in response to a type of event, and cells communicate with each other according to an (asynchronous) event-reaction protocol. According to one embodiment, each cell is responsive to a single type of event and includes a plurality of scripts which are executed upon the occurrence of an event of the appropriate type. At least some scripts include directions to send information to one or more scripts in another cell. According to another embodiment, some cells communicate with other cells according to a (synchronous) streaming protocol and other cells communicate according to an (asynchronous) event-reaction protocol. The cells communicate with each other via a shared memory or via a communications bus. The communications protocol utilized by the cells enables the use of virtually any networking medium. Thus, cells may reside in the same chip or may be separated from each other by thousands of miles.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: August 7, 2001
    Assignee: iQ Net Solutions, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 6202197
    Abstract: An apparatus architecture is provided which permits an easily programmed apparatus (10) to serve as an equivalent of an integrated circuit chip, and/or as a building block for a large system. The apparatus (10) is connected to a communications bus (40) which receives apparatus parameter, topological, and microinstruction information from a host processor and/or memory (EPROM). The apparatus includes numerous functional blocks (20), a core (30), and a parametric/microinstruction bus (35). The functional blocks include serial (62,66) and parallel ports (68), D/A (54) and A/D (52) converters, and programmable signal processors (300) which serve to process signal data and are connected in any desired manner through a switching matrix (160) located in the core. The topology of the switching matrix (160) is received via the communications bus (40).
    Type: Grant
    Filed: April 10, 1990
    Date of Patent: March 13, 2001
    Assignee: Logic Devices Incorporated
    Inventors: Jeffrey I. Robinson, Keith Rouse
  • Patent number: 6072944
    Abstract: The invention provides a distributed processing system having a host processor and one or more object oriented processors which are embodied as discrete components and as a collection of components on a single ASIC chip. A high level command language and a communications bus system are also provided both for use with discrete components and as an integral part of an ASIC chip. The ASIC chips are premanufactured to operate identically to a corresponding collection of discrete components. A distributed processing system is developed by coupling a collection of discrete object oriented processors and a host processor to a bus and writing a command language script to define the functionality of the system. After the system is designed and tested using discrete components, a suitable premanufactured ASIC or collection of ASICs is chosen and coupled to a host processor. The high level command language script permits the host processor and the ASIC system to perform identically to the discrete component system.
    Type: Grant
    Filed: July 17, 1996
    Date of Patent: June 6, 2000
    Assignee: IQ Systems, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 6052729
    Abstract: An object oriented processor array includes a library of functional objects which are instantiated by commands through a system object and which communicate via a high level language. According to the invention, communication is based on an "event-reaction" model. According to the event-reaction model, when a processor object has a message to send, it generates a data event which is registered with the target recipient of the message (usually the host). The target reacts to the event by allowing a variable amount of I/O exchange between the processor object and the target prior to an acknowledgement of the data event. According to one embodiment, until the data event is acknowledged, no other data event may be sent to the target. According to another embodiment, a fixed number of data events may be pending simultaneously.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: April 18, 2000
    Assignee: IQ Systems, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 5922061
    Abstract: A self-timed high speed data communications system includes an N-bit wide data path and a three-bit wide event path. Six states of the event path are used to indicate when data is on the data path for reading and when the data path is available for transmission of data. In a presently preferred embodiment, the event path has three stable states and three meta-stable states. The initial state of the event path is a first stable state. When a user places data on the data path, the event path assumes a first meta-stable state. After the data is read by all users, the event path assumes a second stable state. Further transmission and reception of data cycles the event path through alternating meta-stable and stable states. The event path is preferably zero dominant (one recessive) and stable states are indicated when only one of the three bits are asserted by all users.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: July 13, 1999
    Assignee: IQ Systems
    Inventor: Jeffrey I. Robinson
  • Patent number: 5774721
    Abstract: Distributed processing systems having a host processor and at least one object oriented processor are disclosed. An object oriented processor according to the invention has a communications interface, an intelligent message handler, and a task-specific functionality. The communications interface is coupled to a host processor via a message based communications link. A high level command language is provided which is easily implemented in a host processor program. The command language includes subsets of commands which are understood by different object oriented processors having different functionality. According to one embodiment, the object oriented processor includes support for a broad array of input and output devices. The command language includes high level commands for initializing, reading from and/or writing to the peripherals supported by the object oriented processor.
    Type: Grant
    Filed: September 8, 1995
    Date of Patent: June 30, 1998
    Assignee: IQ Systems, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 5768591
    Abstract: Distributed processing systems having a host processor and at least one object oriented processor are disclosed. An object oriented processor according to the invention has a communications interface, an intelligent message handler, and a task-specific functionality. The communications interface is coupled to a host processor via a message based communications link. A high level command language is provided which is easily implemented in a host processor program. The command language includes subsets of commands which are understood by different object oriented processors having different functionality. According to one embodiment, the object oriented processor includes support for a broad array of input and output devices. The command language includes high level commands for initializing, reading from and/or writing to the peripherals supported by the object oriented processor.
    Type: Grant
    Filed: September 8, 1995
    Date of Patent: June 16, 1998
    Assignee: IQ Systems
    Inventor: Jeffrey I. Robinson
  • Patent number: 5708838
    Abstract: Distributed processing systems having a host processor and at least one object oriented processor are disclosed. An object oriented processor according to the invention has a communications interface, an intelligent message handler, and a task-specific functionality. The communications interface is coupled to a host processor via a message based communications link. A high level command language is provided which is easily implemented in a host processor program. The command language includes subsets of commands which are understood by different object oriented processors having different functionality. According to one embodiment, the object oriented processor includes support for a broad array of input and output devices. The command language includes high level commands for initializing, reading from and/or writing to the peripherals supported by the object oriented processor.
    Type: Grant
    Filed: September 8, 1995
    Date of Patent: January 13, 1998
    Assignee: IQ Systems, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 5687326
    Abstract: Methods and apparatus for implementing a high speed serial communications bus with no data loss include a point-to-point bus and a multi-user bus. Both buses are easily implemented in the system software of virtually any microprocessor and make use of virtually any one, two, or three I/O pins of the processor. The point-to-point bus allows two processors (bus users) to communicate via one, two, or three lines coupled to any two I/O pins of each processor. The multi-user bus allows an unlimited number of processors to communicate via three lines coupled to any three I/O pins of each processor. The methods of the invention include providing each processor with communications software by which data is transmitted and received one bit at a time by asserting one or more of the lines of the bus according to a fixed protocol. In the point-to-point bus, when transmitting a ZERO, the first line is a data line and the second line is an acknowledge line.
    Type: Grant
    Filed: October 20, 1995
    Date of Patent: November 11, 1997
    Assignee: I. Q. Systems, Inc.
    Inventor: Jeffrey I. Robinson
  • Patent number: 5634070
    Abstract: Distributed processing systems having a host processor and at least one object oriented processor are provided. An object oriented processor according to the invention has a communications interface, an intelligent message handler, and a task-specific functionality. The communications interface is coupled to a host processor via a message based communications link. A high level command language is provided which is easily implemented in a host processor program. The command language includes subsets of commands which are understood by different object oriented processors having different functionality. According to one embodiment, the object oriented processor includes support for a broad array of input and output devices. The command language includes high level commands for initializing, reading from and/or writing to the peripherals supported by the object oriented processor.
    Type: Grant
    Filed: September 8, 1995
    Date of Patent: May 27, 1997
    Assignee: IQ Systems
    Inventor: Jeffrey I. Robinson
  • Patent number: 5590349
    Abstract: A programmable integrated signal processor ("SPROC") is provided having a multiported central memory unit (RAM), a program memory, at least one, and preferably a plurality of digital processors coupled to the multiported RAM and to the program memory, a data flow manager which controls external data flowing into the SPROC and processed data flowing out of the SPROC by acting as an interface of such data with the multiported RAM, input and output ports coupled to the DFM and acting as serial interfaces for the SPROC, and a host port permitting the programming of the SPROC and acting as a parallel interface to the SPROC. SPROCs may be coupled via the input and output ports to provide a system. The SPROC architecture permits the SPROC system to be computationally expandable, to have low latency and parasitic overhead for real time I/O, to efficiently execute a multiple of asynchronous processes, and to easily interface with microprocessors of various formats.
    Type: Grant
    Filed: June 18, 1992
    Date of Patent: December 31, 1996
    Assignee: Logic Devices, Inc.
    Inventors: Jeffrey I. Robinson, Keith Rouse, Bruce R. Musicus