Patents by Inventor Jeffrey J. Berube

Jeffrey J. Berube has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for activating a bleed circuit through logic in response to a back-driven voltage on a supply voltage plane
    Patent number: 7028194
    Abstract: A technique usable with a computer includes in response to the computer being in a predetermined sleep state, coupling a load to conduct current from a supply voltage plane of the computer to ground. The supply voltage plane does not receive power from a power resource of the computer in response to the predetermined sleep state. In response to the computer being in a predetermined state other than the predetermined sleep state, the load is decoupled so that the load does not conduct current from the supply voltage plane to ground.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: April 11, 2006
    Assignee: Intel Corporation
    Inventors: Brian S. Forbes, Erik W. Peter, Jeffrey J. Berube, Charles M. Bailley
  • Controlling a supply plane voltage during a sleep state
    Publication number: 20020188876
    Abstract: A technique usable with a computer includes in response to the computer being in a predetermined sleep state, coupling a load to conduct current from a supply voltage plane of the computer to ground. The supply voltage plane does not receive power from a power resource of the computer in response to the predetermined sleep state. In response to the computer being in a predetermined state other than the predetermined sleep state, the load is decoupled so that the load does not conduct current from the supply voltage plane to ground.
    Type: Application
    Filed: June 7, 2001
    Publication date: December 12, 2002
    Inventors: Brian S. Forbes, Erik W. Peter, Jeffrey J. Berube, Charles M. Bailley