Patents by Inventor Jeffrey J. Byrnes

Jeffrey J. Byrnes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8219799
    Abstract: A secure communication system that includes a communication processor, an internet protocol converter that converts data to and from its original protocol to internet protocol, an encryptor/decryptor to provide additional security for communications that are routed through the secure communication system, and a cryptography module and other logic that identifies the security classification of data and verifies the cryptographic keys of the source, in the communication, and of the destination. An additional security processor may be provided as required by secure communication standards. The secure communication system may also include an a internet router that routes the data through the secure communication system. The communication processor provides real-time control and can change a source or destination, an encryption key, a security level, the protocol of a communication in response to sensor data received from a communicating entity or from command signals from a connected or remote control system.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: July 10, 2012
    Assignee: Lockheed Martin Corporation
    Inventors: Frank A. Lucchesi, Christopher T. Wolff, Jeffrey J. Byrnes
  • Publication number: 20110125302
    Abstract: A method and system is provided for verifying and certifying the safety logic of a manufacturing automation system including safety logic, where the logic may include one or more safety modules, routines, programs and tasks or a combination thereof; testing specifications corresponding to the safety logic; one or more formal model generators adapted for automatically transforming the safety logic and testing specifications through a logic parser into their respective mathematical models, formatted for example, as a Petri-net or binary decision diagram; a safety logic verifier configured for automatically comparing the safety logic formal model against the testing specification formal model to verify the safety logic model for the purpose of certifying the safety logic. The testing specifications may include testing of safety logic behavior including reaching safe state, remaining in safe state without reset, recovering from safe state with reset and remaining active with false alarm detection.
    Type: Application
    Filed: October 23, 2009
    Publication date: May 26, 2011
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS, INC.
    Inventors: Nagarajan Sethuraman, Jerome O. Schroeder, Soumen De, Chengyin Yuan, Stephan R. Biller, Frank Gajor, Jeffrey J. Byrnes, Narahari K. Hunsur
  • Publication number: 20100023534
    Abstract: A method is provided for certifying safety logic code in a manufacturing automation system. A plurality of safety related test scenarios is provided for testing the safety logic code in the manufacturing automation system. A processing unit is configured for communication with the logic controller. The processing unit generates logic input signals in response to the plurality of safety related test scenarios and provides the logic input signals to the logic controller. Execution of the plurality of safety related test scenarios via the safety logic code is triggered in response to the processing unit providing the logic input signals to the logic controller. Response output signals are generated by the logic controller in response to the safety related test scenarios being executed by the safety logic code. Compliancy of the safety logic code is determined by evaluating response output signals and associated logic input signals to a predetermined standard.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 28, 2010
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS, INC.
    Inventors: Jing Liu, Chengyin Yuan, Fangming Gu, Stephan R. Biller, Jerome O. Schroeder, Richard C. Immers, Jeffrey J. Byrnes