Abstract: A pressure sensor assembly, which includes a support substrate, circuitry mounted to the support substrate, at least one conductor mounted to the support substrate and in electrical communication with the circuitry, and at least one vertically conductive path connected to and in electrical communication with the at least one conductor. The pressure sensor assembly also includes a diaphragm, at least one sealing glass section connected to the diaphragm and the support substrate, and at least one lateral conductive feed-through mounted to the diaphragm. At least one conductive joint is connected to the vertically conductive path and the lateral conductive feed-through, and the conductive joint provides electrical communication between the vertically conductive path and the lateral conductive feed-through.

Abstract: A pressure sensor assembly, which includes a support substrate, circuitry mounted to the support substrate, at least one conductor mounted to the support substrate and in electrical communication with the circuitry, and at least one vertically conductive path connected to and in electrical communication with the at least one conductor. The pressure sensor assembly also includes a diaphragm, at least one sealing glass section connected to the diaphragm and the support substrate, and at least one lateral conductive feed-through mounted to the diaphragm. At least one conductive joint is connected to the vertically conductive path and the lateral conductive feed-through, and the conductive joint provides electrical communication between the vertically conductive path and the lateral conductive feed-through.

Abstract: In a MEMS PRT having a diaphragm that is located offset from the center of the die, thermally-induced thermal noise in the output of a Wheatstone bridge circuit is reduced by locating the Wheatstone bridge circuit away from the largest area of the die and supporting pedestal.

Abstract: Ultra-thin semiconductor devices, including piezoresistive sensing elements can be formed in a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and fusion bonding. A trench is etched around each thin die to separate the thin die from others in the wafer stack. A tether layer, also known as a tether, is used to hold thin dice or dice in a wafer stack. Such as wafer stack holds many thin dice together at a wafer level for handling and enables easier die picking in packaging processes.

Abstract: Ultra-thin semiconductor devices, including piezo-resistive sensing elements can be formed a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and fusion bonding. A trench is etched around each thin die to separate the thin die from others in the wafer stack. A tether layer, also known as a tether, is used to hold thin dice or dice in a wafer stack. Such as wafer stack holds many thin dice together at a wafer level for handling and enables easier die picking in packaging processes.

Abstract: In a MEMS PRT having a diaphragm that is located offset from the center of the die, thermally-induced thermal noise in the output of a Wheatstone bridge circuit is reduced by locating the Wheatstone bridge circuit away from the largest area of the die and supporting pedestal.

Abstract: MEMS pressure sensing elements, the fabrication methods of the sensing elements, and the packaging methods using the new sensing elements are introduced to provide a way for a harsh media absolute pressure sensing and eliminating the negative effects caused by the gel used in the prior art. The invention uses vertical conductive vias to electrically connect the enclosed circuit to the outside, and uses a fusion bond method to attach a cap with the embedded conductive vias over a device die having a circuit for example a piezoresistive Wheatstone bridge to sense pressure. New packaging methods comprise a) a two-pocket housing structure and using a surface mounting method to attach a new sensing element into one pocket by a ball grid array (BGA), and b) a single pocket structure and using conventional die attach and wire bonding. Both methods can be used for harsh media pressure sensing but without the negative effects caused by the gel in prior art.

Abstract: Ultra-thin semiconductor devices, including piezo-resistive sensing elements can be formed a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and fusion bonding. A trench is etched around each thin die to separate the thin die from others in the wafer stack. A tether layer, also known as a tether, is used to hold thin dice or dice in a wafer stack. Such as wafer stack holds many thin dice together at a wafer level for handling and enables easier die picking in packaging processes.

Abstract: Ultra-thin semiconductor devices, including piezoresistive sensing elements can be formed in a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and fusion bonding. A trench is etched around each thin die to separate the thin die from others in the wafer stack. A tether layer, also known as a tether, is used to hold thin dice or dice in a wafer stack. Such as wafer stack holds many thin dice together at a wafer level for handling and enables easier die picking in packaging processes.

Abstract: Ultra-thin semiconductor devices, including piezoresistive sensing elements can be formed in a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and fusion bonding. A trench is etched around each thin die to separate the thin die from others in the wafer stack. A tether layer, also known as a tether, is used to hold thin dice or dice in a wafer stack. Such as wafer stack holds many thin dice together at a wafer level for handling and enables easier die picking in packaging processes.

Abstract: MEMS pressure sensing elements, the fabrication methods of the sensing elements, and the packaging methods using the new sensing elements are introduced to provide a way for a harsh media absolute pressure sensing and eliminating the negative effects caused by the gel used in the prior art. The invention uses vertical conductive vias to electrically connect the enclosed circuit to the outside, and uses a fusion bond method to attach a cap with the embedded conductive vias over a device die having a circuit for example a piezoresistive Wheatstone bridge to sense pressure. New packaging methods comprise a) a two-pocket housing structure and using a surface mounting method to attach a new sensing element into one pocket by a ball grid array (BGA), and b) a single pocket structure and using conventional die attach and wire bonding. Both methods can be used for harsh media pressure sensing but without the negative effects caused by the gel in prior art.

Abstract: Ultra-thin semiconductor devices, including piezoresistive sensing elements can be formed in a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and fusion bonding. A trench is etched around each thin die to separate the thin die from others in the wafer stack. A tether layer, also known as a tether, is used to hold thin dice or dice in a wafer stack. Such as wafer stack holds many thin dice together at a wafer level for handling and enables easier die picking in packaging processes.

Abstract: A microdevice that comprises a device microstructure (38) and vent channel (34) in a wafer (14) that is sandwiched between a substrate (10) and a cap (16). The cap (16) and substrate (10) have recesses (41, 21) around the microstructure (22) to define a cavity. A vent (25) is connected to the vent channel (34) and subsequently to the cavity. The vent (25) is used to evacuate and seal the microstructure (38) in the cavity. A getter layer (32) can be used to maintain the cavity vacuum. An electrical connection can be provided through the vent (25), vent channel (34) and cavity to the getter (32) to electrically ground the getter layer (32).

Abstract: A microdevice (20, 120, 220) having a hermetically sealed cavity (22, 122, 222) to house a microstructure (26, 126, 226). In one embodiment, the microdevice (20) comprises a substrate (30), a cap (50) and an isolation layer (70). The substrate (30) has a plurality of conductive traces (38) formed on at least a portion of its top side (32) and outer edge (36). The conductive traces (38) provide electrical conductivity to the microstructure (26). The isolation layer (70) is attached between an outer edge of a sidewall (54) of the cap (50) and the plurality of conductive traces (38). The cavity (22) is at least partially defined by a recess (56) in the cap (50). There is also a microdevice (120) comprising a substrate (130), a cap (150) and a plurality of via covers (170). The substrate (130) has conductive vias (196) that terminate at a contact point (146) within the sealed cavity (122). The via covers (170) are attached to the substrate (130) to provide a hermetic seal.

Abstract: A microdevice (20, 120, 220) having a hermetically sealed cavity (22, 122, 222) to house a microstructure (26, 126, 226). In one embodiment, the microdevice (20) comprises a substrate (30), a cap (50) and an isolation layer (70). The substrate (30) has a plurality of conductive traces (38) formed on at least a portion of its top side (32) and outer edge (36). The conductive traces (38) provide electrical conductivity to the microstructure (26). The isolation layer (70) is attached between an outer edge of a sidewall (54) of the cap (50) and the plurality of conductive traces (38). The cavity (22) is at least partially defined by a recess (56) in the cap (50). There is also a microdevice (120) comprising a substrate (130), a cap (150) and a plurality of via covers (170). The substrate (130) has conductive vias (196) that terminate at a contact point (146) within the sealed cavity (122). The via covers (170) are attached to the substrate (130) to provide a hermetic seal.