Abstract: High priority data and low priority digital data are transmitted as primary and secondary data in hierarchically modulated, orthogonal frequency division multiplexing (OFDM) from an earth-orbiting satellite. To enable the transmitter amplifier to be operated with less back-off from saturation without clipping, the low priority OFDM symbols have fewer samples than the high priority OFDM symbols, and the high priority samples on which the low priority samples are superimposed are selected according to a first deterministic rule using sample power comparisons of the high priority samples to concentrate the low priority samples on those high priority samples having lower (optimally, the lowest) sample power. The low priority samples are distributed on the selected high priority samples according to a second deterministic rule relating the original low priority sample order to the original high priority sample order.

Abstract: High priority data and low priority digital data are transmitted as primary and secondary data in hierarchically modulated, orthogonal frequency division multiplexing (OFDM) from an earth-orbiting satellite. To enable the transmitter amplifier to be operated with less back-off from saturation without clipping, the low priority OFDM symbols have fewer samples than the high priority OFDM symbols, and the high priority samples on which the low priority samples are superimposed are selected according to a first deterministic rule using sample power comparisons of the high priority samples to concentrate the low priority samples on those high priority samples having lower (optimally, the lowest) sample power. The low priority samples are distributed on the selected high priority samples according to a second deterministic rule relating the original low priority sample order to the original high priority sample order.

Abstract: A system and method of a stereo receiving system, including a plurality of antennas, a receiving device, a plurality of summing devices, a phase lock loop device, a controllable phase shifter device, and a gain-control device. The plurality of antennas receive RF signals having a common frequency but potentially different phases. The receiving device is in electrical communication with the plurality of antennas. The plurality of summing devices are in electrical communication between at least one of the plurality of antennas and the receiving device. The phase lock loop device is in electrical communication with the receiving device. The gain-control device is in electrical communication between the plurality of antennas and the receiving device, wherein the gain-control device controls a signal-to-noise ratio of the RF signals aligned from the plurality of antennas.

Abstract: An SDARS receiver for use with at least two antennae, each of which receives bitstreams from a first satellite, bitstreams from a second satellite, and bitstreams from a terrestrial repeater, including demodulators configured to switch between demodulating bitstreams from the satellites and to switch between demodulating bitstreams from the terrestrial repeater, and a processor coupled to the demodulators, the processor being configured to switch the demodulators according to a variety of algorithms.

Abstract: An RF receiver system is provided having a plurality of selectable antennas. The system includes a receiver for receiving RF signals from one of the plurality of antennas at a time. The receiver includes processing circuitry for processing the RF signals and generating a control signal to control selection of one of the antennas at a time. The system further includes a switched diversity module having a plurality of switches coupled to the plurality of antennas for selecting one of the antennas at a time. The switched diversity module further includes logic receiving the control signal generated by the receiver and generating logic output signals to control selection of one of the antennas at a time.

Abstract: A communication assembly is provided for a vehicle to communicate audio sound inside and outside the vehicle. The communication assembly includes a housing such as an exterior rearview mirror housing. The housing has a sound port in communication with an outside environment external to the vehicle. The sound communication assembly also includes an audio speaker and microphone located in the housing in audio communication with the sound port. The audio speaker is operable to provide audio sound to the outside environment external to the vehicle. The communication assembly further includes a communication link coupled to the audio speaker and microphone for providing signals to the audio speaker and microphone to broadcast audio sound to the outside environment.

Abstract: A system and method of a stereo receiving system, including a plurality of antennas, a receiving device, a plurality of summing devices, a phase lock loop device, a controllable phase shifter device, and a gain-control device. The plurality of antennas receive RF signals having a common frequency but potentially different phases. The receiving device is in electrical communication with the plurality of antennas. The plurality of summing devices are in electrical communication between at least one of the plurality of antennas and the receiving device. The phase lock loop device is in electrical communication with the receiving device. The gain-control device is in electrical communication between the plurality of antennas and the receiving device, wherein the gain-control device controls a signal-to-noise ratio of the RF signals aligned from the plurality of antennas.

Abstract: A transceiver for transmitting and receiving satellite RF signals is provided. The transceiver includes RF front-end receiver circuitry capable of receiving FM radio broadcast RF signals and converting the FM radio broadcast RF signals to an intermediate frequency. The RF front-end receiver circuitry is configured to receive RF signals at greater than 108 MHz and convert the RF signals to an intermediate frequency. The transceiver also includes signal processing circuitry including at least one DSP core for demodulating intermediate frequency signals provided by the front-end circuitry and for modulating data to be transmitted into baseband modulated data signals, and at least one audio output. The transceiver further includes RF transmitter circuitry configured to convert the baseband modulated data signals provided by the at least one DSP core into modulated transmit signals having a frequency greater than 108 MHz for transmission and transmit the modulated transmit signals.

Abstract: An automatic gain control circuit that maximizes front-end signal attenuation is disclosed. The automatic gain control circuit comprises a keyed automatic gain control circuit and an intermodulation detector. The intermodulation detector detects signal interference and generates an intermodulation detection flag. The keyed automatic gain control circuit uses the intermodulation detection flag to control front-end signal attenuation. A method for maximizing front-end signal attenuation for the automatic gain control circuit is also disclosed.

Abstract: An AM stereo input signal is processed by an envelope detector, an in-phase detector and a quadrature phase detector to yield outputs which may carry short noise impulses. Each output is low pass filtered to derive an average signal level and each output is ratiometrically compared to the corresponding average to detect a tic or modulation substantially above the average. In response to a tic a hold circuit generates a flag for a period which depends on the quality of the input signal. A dual mode deemphasis and sample/hold circuit normally filters the audio signal in each channel and is effective for the duration of the flag to hold the existing signal in the circuit to blank out the noise impulse.

Abstract: An adaptive audio processor for stereo AM broadcast signals includes independent signal processing paths. Each path has a variable lowpass filter and a matrix and variable Q 10 kHz notch filter to form LEFT and RIGHT channel signals with a 10 kHz notched pass band determined by adjacent channel noise. A 10 kHz pass band signal representative of adjacent channel noise from one of the signal processing paths is compared to a reference to generate a correction signal that is fedback to control the lowpass and notch filters. The correction signal adjusts the pass band and Q of the lowpass and notch filters so that the effects of adjacent channel noise are minimized. Other receiver signals which are reflective of the quality of the received broadcast signal, e.g., the AGC signal, an excess modulation signal, and a receiver microprocessor signal are similarly employed to control the lowpass and notch filters.

Abstract: A differential operational amplifier comprises a differential input circuit that provides a differential output signal to a plurality of independent output circuits. The gains of the differential input circuit and one output circuit are set by a fixed bias source. A variable bias source controlled by an external signal determines the gain of each other output circuit so that various attenuation characteristics are obtained in the other output circuits without affecting the operating conditions of the operational amplifier. A feedback element between the output of the one output circuit and the differential input circuit assures gain stability.

Abstract: An ajustable switched capacitor circuit comprises a first stage, a second stage and a switched capacitor circuit coupling the output of the first stage to the input of the second stage. The operating parameters of the second stage are a function of the effective resistance of the switched capacitor coupling circuit. An attenuator interposed between the output of the first stage and the input of the switched capacitor coupling circuit controls the charging voltage of the switched capacitor coupler thereby controlling its effective resistance and parameters of the output stage. The signal loss through the attenuator is continuously adjustable responsive to an external control voltage to obtain continuous control of various output stage parameters. The output stage may comprise a filter having the parameters of its transfer function determined by the effective resistance of the switched capacitor coupling circuit.

Abstract: An audio detector circuit forms L+R and L-R audio signals from an intermediate frequency compatible quadrature amplitude modulated signal in the form (1+L+R)cos(fct+.phi.) where .phi. contains phase modulated L+R and L-R signals. An envelope detector generates an L+R audio signal and in-phase and quadrature phase detectors produce L+R and L-R audio signals, respectively. The difference between L+R outputs of the envelope and in-phase detectors are amplified to generate a cosine correction signal. Each detector includes a differential operational amplifier having an field effect feedback transistor coupled between each amplifier output and the corresponding input and an field effect transistor coupling the compatible quadrature amplitude modulated signal to the operational amplifier inputs.

Abstract: An FM stereo radio circuit has an ultrasonic noise detector and an amplitude noise detector each for detecting impulse noise by developing an average noise signal and comparing the average noise signal with an attenuated value of the instantaneous noise signal to generate a noise flag. A dual mode circuit normally operates as a low pass filter for a deemphasis function and is switched by the noise flag to operate as a sample and hold circuit which blanks the noise pulse. The dual mode circuit uses a switched capacitance design and is driven by clock signals to serve as a filter. The clock signals are stopped by the noise flag to effect the sample and hold function.

Abstract: An analog/digital voltage controlled oscillator includes a voltage to pulse converter which responds to a control voltage to generate appropriate control pulses to change the mode of operation of a divider to thereby vary the output frequency of the oscillator.

Abstract: A phase locked loop (PLL) with a narrow bandwidth, and small phase noise which is particularly useful in a FM stereo decoder includes both analog and digital circuitry and has the advantages of both types of systems, performing better than standard PLL's without the need for any external components. An externally referenced digital voltage controlled oscillator, establishes the center frequency of the PLL while analog portions of the circuit permits accurate locking to the input signal and provides a high level of quietness of the system.

Abstract: An attenuator in the composite L-R signal path used for dynamic signal control for blend purposes is limited in range by a static separation adjust signal which attenuates the maximum L-R signal to a value selected for the best right and left channel separation upon matrixing of the L+R and L-R signals. The gain of the L-R signal path is set greater than the L+R path so that a wide adjustment range is available to the separation adjustment circuit.

Abstract: A circuit is provided which gauges the amount of significant high-frequency spectral energy in the very recent history of the program material and ignores the effects of short noise bursts and other transients associated with FM reception in the moving vehicle. The circuit provides an output voltage which can be used to adjust the attack characteristics of an audio processor.

Abstract: A switched capacitor low pass filter is used to sample an FM stereo composite signal with non-overlapping clock signal to achieve phase or magnitude detection of the 19 kHz pilot without being adversely affected by the presence of information at or about 57 kHz.