Abstract: A thermal metamaterial device comprises at least one MEMS thermal switch, including a substrate layer including a first material having a first thermal conductivity, and a thermal bus over a first portion of the substrate layer. The thermal bus includes a second material having a second thermal conductivity higher than the first thermal conductivity. An insulator layer is over a second portion of the substrate layer and includes a third material that is different from the first and second materials. A thermal pad is supported by a first portion of the insulator layer, the thermal pad including the second material and having an overhang portion located over a portion of the thermal bus. When a voltage is applied to the thermal pad, an electrostatic interaction occurs to cause a deflection of the overhang portion toward the thermal bus, thereby providing thermal conductivity between the thermal pad and the thermal bus.

Abstract: An optical phase modulator comprises a cascaded array of optical resonators, wherein each of the optical resonators has an input port and an output port. A plurality of waveguides are coupled between the optical resonators and are configured to provide cascaded optical communication between the optical resonators. Each of the waveguides is respectively coupled between the output port of one optical resonator and the input port of an adjacent optical resonator. A transmission electrode is positioned adjacent to the optical resonators, with the transmission electrode configured to apply a drive voltage across the optical resonators. The optical phase modulator is operative to co-propagate an input optical wave with the drive voltage, such that a resonator-to-resonator optical delay is matched with a resonator-to-resonator electrical delay.

Abstract: A thermal metamaterial device comprises at least one MEMS thermal switch, comprising a substrate layer including a first material having a first thermal conductivity, and a thermal bus over a first portion of the substrate layer. The thermal bus includes a second material having a second thermal conductivity higher than the first thermal conductivity. An insulator layer is over a second portion of the substrate layer and includes a third material that is different from the first and second materials. A thermal pad is supported by a first portion of the insulator layer, the thermal pad including the second material and having an overhang portion located over a portion of the thermal bus. When a voltage is applied to the thermal pad, an electrostatic interaction occurs to cause a deflection of the overhang portion toward the thermal bus, thereby providing thermal conductivity between the thermal pad and the thermal bus.

Abstract: An optical phase modulator comprises a cascaded array of optical resonators, wherein each of the optical resonators has an input port and an output port. A plurality of waveguides are coupled between the optical resonators and are configured to provide cascaded optical communication between the optical resonators. Each of the waveguides is respectively coupled between the output port of one optical resonator and the input port of an adjacent optical resonator. A transmission electrode is positioned adjacent to the optical resonators, with the transmission electrode configured to apply a drive voltage across the optical resonators. The optical phase modulator is operative to co-propagate an input optical wave with the drive voltage, such that a resonator-to-resonator optical delay is matched with a resonator-to-resonator electrical delay.

Abstract: A chip scale atomic clock (CSAC) includes a temperature stabilized physics system and a temperature stabilized electronics circuitry electrically coupled to the temperature stabilized physics system. Atomic clocks utilize an optical signal having a frequency component. The temperature stabilization increases frequency stability. The temperature stabilized physics system includes a vapor cell and a magnetic field coil, and is enclosed in a magnetic shield. When an ambient temperature of a chip scale atomic clock increases, fluid is extended away, due to thermal expansion, from at least one reservoir towards or away from a thermally isolated subsystem in at least one of the temperature stabilized electronics circuitry and the temperature stabilized physics system.

Abstract: Methods are provided for authenticating a value article that includes a luminescent material. An exciting light source, an optical filter, a photodetector, a signal manipulation circuit, and an amplifier are provided. The luminescent material is exposed to light produced by the exciting light source. Radiation including light from the exciting light source and emitted radiation from the luminescent material is filtered using the optical filter to produce filtered radiation. The filtered radiation is detected using the photodetector to produce a detected radiation signal. The detected radiation signal is electronically manipulated using the signal manipulation circuit to reduce an effect of light from the exciting light source on an authentication determination based upon the detected radiation signal. The detected radiation signal is amplified with the amplifier after electronic manipulation to produce an amplified electronic signal.

Abstract: A chip scale atomic clock (CSAC) is provided. The CSAC comprises: a temperature stabilized physics system, comprising a vapor cell and a magnetic field coil, and which is enclosed in a magnetic shield; and a temperature stabilized electronics circuitry electrically coupled to the temperature stabilized physics system.

Abstract: Embodiments herein provide for a self-destructing chip including at least a first die and a second die. The first die includes an electronic circuit, and the second die is composed of one or more polymers that disintegrates at a first temperature. The second die defines a plurality of chambers, wherein a first subset of the chambers contain a material that reacts with oxygen in an exothermic manner. A second subset of the chambers contain an etchant to etch materials of the first die. In response to a trigger event, the electronic circuit is configured to expose the material in the first subset of chambers to oxygen in order to heat the second die to at least the first temperature, and is configured to release the etchant from the second subset of the chambers to etch the first die.

Abstract: A self destructing device includes: at least one active electronic region and at least one thermal destruction trigger; at least one chamber enclosed by the semiconducting material, wherein the at least one chamber contains an etchant material, wherein in response to activation of the at least one thermal destruction trigger, the self-destructing device is configured to: generate heat to cause decomposition of at least a first portion of the etchant material; decompose at least a first portion of the etchant material; etch at least a second portion of the second oxide layer provided between the semiconducting material and the at least one chamber at a first temperature; expose the etchant material to the semiconducting material to cause an exothermic reaction generating more heat; enable spread of the exothermic reaction to etch at least a third portion of the first oxide layer and to etch the top layer.

Abstract: A self destructing device includes: at least one active electronic region and at least one thermal destruction trigger; at least one chamber enclosed by the semiconducting material, wherein the at least one chamber contains an etchant material, wherein in response to activation of the at least one thermal destruction trigger, the self-destructing device is configured to: generate heat to cause decomposition of at least a first portion of the etchant material; decompose at least a first portion of the etchant material; etch at least a second portion of the second oxide layer provided between the semiconducting material and the at least one chamber at a first temperature; expose the etchant material to the semiconducting material to cause an exothermic reaction generating more heat; enable spread of the exothermic reaction to etch at least a third portion of the first oxide layer and to etch the top layer.

Abstract: Embodiments herein provide for a self-destructing chip including at least a first die and a second die. The first die includes an electronic circuit, and the second die is composed of one or more polymers that disintegrates at a first temperature. The second die defines a plurality of chambers, wherein a first subset of the chambers contain a material that reacts with oxygen in an exothermic manner. A second subset of the chambers contain an etchant to etch materials of the first die. In response to a trigger event, the electronic circuit is configured to expose the material in the first subset of chambers to oxygen in order to heat the second die to at least the first temperature, and is configured to release the etchant from the second subset of the chambers to etch the first die.

Abstract: Methods are provided for authenticating a value article that includes a luminescent material. An exciting light source, an optical filter, a photodetector, a signal manipulation circuit, and an amplifier are provided. The luminescent material is exposed to light produced by the exciting light source. Radiation including light from the exciting light source and emitted radiation from the luminescent material is filtered using the optical filter to produce filtered radiation. The filtered radiation is detected using the photodetector to produce a detected radiation signal. The detected radiation signal is electronically manipulated using the signal manipulation circuit to reduce an effect of light from the exciting light source on an authentication determination based upon the detected radiation signal. The detected radiation signal is amplified with the amplifier after electronic manipulation to produce an amplified electronic signal.

Abstract: Systems and methods for a wafer scale atomic clock are provided. In at least one embodiment, a wafer scale device comprises a first substrate; a cell layer joined to the first substrate, the cell layer comprising a plurality of hermetically isolated cells, wherein separate measurements are produced for each cell in the plurality of hermetically isolated cells; and a second substrate joined to the cell layer, wherein the first substrate and the second substrate comprise electronics to control the separate measurements, wherein the separate measurements are combined into a single measurement.

Abstract: In an example, a chip-scale atomic clock physics package is provided. The physics package includes a body defining a cavity having a base surface and one or more side walls. The cavity includes a first step surface and a second step surface defined in the one or more side walls. A first scaffold mounted to the base surface in the cavity. One or more spacers defining an aperture therethrough are mounted to the second step surface in the cavity. A second scaffold is mounted to a first surface of the one or more spacers spans across the aperture of the one or more spacers. A third scaffold is mounted to a second surface of the one or more spacers in the cavity and spans across the aperture of the one or more spacers. Other components of the physics package are mounted to the first, second, and third scaffold.

Abstract: Systems and methods for a wafer scale atomic clock are provided. In at least one embodiment, a wafer scale device comprises a first substrate; a cell layer joined to the first substrate, the cell layer comprising a plurality of hermetically isolated cells, wherein separate measurements are produced for each cell in the plurality of hermetically isolated cells; and a second substrate joined to the cell layer, wherein the first substrate and the second substrate comprise electronics to control the separate measurements, wherein the separate measurements are combined into a single measurement.

Abstract: In an example, a chip-scale atomic clock physics package is provided. The physics package includes a body defining a cavity having a base surface and one or more side walls. The cavity includes a first step surface and a second step surface defined in the one or more side walls. A first scaffold mounted to the base surface in the cavity. One or more spacers defining an aperture therethrough are mounted to the second step surface in the cavity. A second scaffold is mounted to a first surface of the one or more spacers spans across the aperture of the one or more spacers. A third scaffold is mounted to a second surface of the one or more spacers in the cavity and spans across the aperture of the one or more spacers. Other components of the physics package are mounted to the first, second, and third scaffold.

Abstract: A two-dimensional array of patch antennas positioned on a plate of dielectric material and so phased and weighted that they provide a three dimensional melon-shaped pattern having high attenuation from the plane of the array to a desired angle above the plane for use in a differential global position system to reject reflections from nearby objects.