Patents by Inventor JEFFREY KEVIN JONES

JEFFREY KEVIN JONES has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10115697
    Abstract: A coupling element for providing external coupling to a semiconductor die within an integrated circuit package. The coupling element comprises a flexible laminate structure comprising a flexible, electrically insulating substrate layer, a first conductive layer bonded to a first surface of the substrate layer, and a second conductive layer bonded to a second surface of the substrate layer. The coupling element is arranged to be coupled to the semiconductor die such that the first and second conductive layers are electrically coupled to electrical contacts of the semiconductor die. The coupling element is further arranged to extend through the integrated circuit package when electrically coupled to the semiconductor die, and for the first and second conductive layers to be further electrically coupled to at least one external component.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: October 30, 2018
    Assignee: NXP USA, INC.
    Inventors: Jeffrey Kevin Jones, Igor Blednov
  • Publication number: 20180175802
    Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 21, 2018
    Inventors: Yu-Ting David Wu, Enver Krvavac, Joseph Gerard Schultz, Nick Yang, Damon G. Holmes, Shishir Ramasare Shukla, Jeffrey Kevin Jones, Elie A. Maalouf, Mario Bokatius
  • Patent number: 9991854
    Abstract: Embodiments of an RF amplifier include a transistor with a control terminal and first and second current carrying terminals, and a shunt circuit coupled between the first current carrying terminal and a ground reference node. The shunt circuit includes a first shunt inductive element, a second shunt inductance, and a shunt capacitor coupled in series. Instead of a separate inductive element, the second shunt inductance may be achieved via magnetic coupling of the first shunt inductive element and an envelope inductive element of a video bandwidth circuit that is coupled between an RF cold point node (between the first and second shunt inductances) and the ground. Alternatively, an envelope inductance in the video bandwidth circuit may be achieved via magnetic coupling of first and second shunt inductive elements. A better RF cold point may be achieved without physically incorporating separate inductive elements, allowing for reduction in cost and size.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: June 5, 2018
    Assignee: NXP USA, INC.
    Inventors: Ning Zhu, Damon G. Holmes, Ricardo Uscola, Jeffrey Kevin Jones
  • Patent number: 9979360
    Abstract: An RF amplifier includes a transistor, a shunt circuit, an envelope frequency termination circuit, and an extra lead. The shunt circuit is coupled between a transistor current carrying terminal and a ground reference node. The shunt circuit has a shunt inductive element and a shunt capacitor coupled in series, with an RF cold point node between the shunt inductive element and the shunt capacitor. The envelope frequency termination circuit is coupled between the RF cold point node and the ground reference node. The envelope frequency termination circuit has an envelope resistor, an envelope inductive element, and an envelope capacitor coupled in series. The extra lead is electrically coupled to the RF cold point node. The extra lead provides a lead inductance in parallel with an envelope inductance provided by the envelope inductive element. An additional shunt capacitor can be coupled between the extra lead and ground.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: May 22, 2018
    Assignee: NXP USA, INC.
    Inventors: Roy McLaren, Ning Zhu, Damon G. Holmes, Jeffrey Kevin Jones
  • Publication number: 20170179063
    Abstract: A coupling element for providing external coupling to a semiconductor die within an integrated circuit package. The coupling element comprises a flexible laminate structure comprising a flexible, electrically insulating substrate layer, a first conductive layer bonded to a first surface of the substrate layer, and a second conductive layer bonded to a second surface of the substrate layer. The coupling element is arranged to be coupled to the semiconductor die such that the first and second conductive layers are electrically coupled to electrical contacts of the semiconductor die. The coupling element is further arranged to extend through the integrated circuit package when electrically coupled to the semiconductor die, and for the first and second conductive layers to be further electrically coupled to at least one external component.
    Type: Application
    Filed: November 30, 2016
    Publication date: June 22, 2017
    Inventors: Jeffrey Kevin Jones, Igor Blednov
  • Patent number: 9325357
    Abstract: A wireless communication unit comprising a transmitter comprises: a linearization circuit arranged to receive and digitally distort an input signal; a radio frequency power amplifier operably coupled to the linearization circuit and arranged to amplify a radio frequency representation of the digitally distorted input signal; a feedback path arranged to feed back a portion of the amplified digitally distorted output of the received input signal to the linearization circuit; a bypass circuit comprising a plurality of energy storage elements operably coupled between an output of the radio frequency power amplifier and ground; and a first connector arranged to provide a representation of at least one electrical memory effect of at least one of the plurality of energy storage elements to the linearization circuit, wherein the linearization circuit is arranged to use the representation of the at least one electrical memory effect when digitally distorting the input signal.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: April 26, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Youri Volokhine, Jeffrey Kevin Jones
  • Publication number: 20160065250
    Abstract: A wireless communication unit comprising a transmitter comprises: a linearization circuit arranged to receive and digitally distort an input signal; a radio frequency power amplifier operably coupled to the linearization circuit and arranged to amplify a radio frequency representation of the digitally distorted input signal; a feedback path arranged to feed back a portion of the amplified digitally distorted output of the received input signal to the linearization circuit; a bypass circuit comprising a plurality of energy storage elements operably coupled between an output of the radio frequency power amplifier and ground; and a first connector arranged to provide a representation of at least one electrical memory effect of at least one of the plurality of energy storage elements to the linearization circuit, wherein the linearization circuit is arranged to use the representation of the at least one electrical memory effect when digitally distorting the input signal.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 3, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: YOURI VOLOKHINE, JEFFREY KEVIN JONES