Abstract: An example method is performed at a device with a display and a biometric sensor. While the device is in a locked state, the method includes displaying a log-in user interface that is associated with logging in to a first and second user account. While displaying the log-in user interface, the method includes, receiving biometric information, and in response to receiving the biometric information: when the biometric information is consistent with biometric information for the first user account and the first user account does not have an active session, displaying a prompt to input a log-in credential for the first user account; and when the biometric information is consistent with biometric information for the second user account and the second user account does not have an active session on the device, displaying a prompt to input a log-in credential for the second user account.

Abstract: An example method is performed at a device with a display and a biometric sensor. While the device is in a locked state, the method includes displaying a log-in user interface that is associated with logging in to a first and second user account. While displaying the log-in user interface, the method includes, receiving biometric information, and in response to receiving the biometric information: when the biometric information is consistent with biometric information for the first user account and the first user account does not have an active session, displaying a prompt to input a log-in credential for the first user account; and when the biometric information is consistent with biometric information for the second user account and the second user account does not have an active session on the device, displaying a prompt to input a log-in credential for the second user account.

Abstract: A process is provided for operating a computer system (100) having a storage holding an operating system (OS) and an application program (APP.exe) and a third program (VSP Kernel), a first processor (106) having an instruction set, and a second processor (1730) having a different instruction set. The process includes a first step of running the first processor (106) to determine whether a part of the application shall be run on the first processor or the second processor and then establishing a second processor object (VSP OBJECT1) if said part shall be run on the second processor and the first processor (106) sending a message that the second processor (1730) is to run said at least part of the application program. The third program establishes message handling functions and bus masters data transfer operations for the second processor between the host running the operating system and the second processor running the third program.

Abstract: An integrated circuit (1720) includes a dual-port memory (3330.1) having a first memory port (Port A) and a second memory port (Port B), a bus interface block (5010) including bus master (5016) and bus slave circuitry (5018), and a byte-channeling block (5310) coupled between the first memory port (Port A) and the bus interface block (5010) operable to convert non-aligned data addresses into aligned data. Advantageously, this invention includes a single bus master serving all application hardware. This relieves the host of the extra burden of communicating to slave circuits, reducing host I/O MIPS significantly. The digital signal processor with an ASIC wrapper of this invention together provide super-bus-mastering to access the entire memory space in the system, including the entire virtual memory space accessible by the host processor. Other processes, systems, devices and methods are also disclosed.