Patents by Inventor Jeffrey L. Libbert

Jeffrey L. Libbert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250069945
    Abstract: A method of preparing a silicon-on-insulator structure includes forming an epitaxial silicon layer on a front surface of a single crystal silicon donor substrate, forming a dielectric layer on the epitaxial silicon layer to thereby form an epitaxial donor structure including the single crystal silicon donor substrate, the epitaxial silicon layer, and the dielectric layer, bonding the dielectric layer of the epitaxial donor structure to a front surface of a handle structure, the handle structure including a single crystal semiconductor handle substrate, to thereby form a bonded structure including the handle structure, the dielectric layer, the epitaxial silicon layer, and the single crystal silicon donor substrate, and removing the single crystal silicon donor substrate and a portion of the epitaxial silicon layer from the bonded structure to thereby form the silicon-on-insulator structure including the handle structure, the dielectric layer, and a silicon device layer.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 27, 2025
    Inventors: Qingmin Liu, Xiaofei Lu, Jeffrey L. Libbert
  • Publication number: 20240258155
    Abstract: A method of preparing a multilayer structure includes providing a single crystal semiconductor handle substrate that includes a front surface, a back surface, a circumferential edge joining the front and back surfaces, and a central plane between the front and back surfaces. The single crystal semiconductor handle substrate has a minimum bulk region resistivity of at least about 500 Ohm-cm. The method also includes depositing a semiconductor layer on the front surface of the single crystal semiconductor handle substrate. Depositing the semiconductor layer is performed by two or more cycles of depositing a portion of the semiconductor layer and interrupting the deposition after the portion of the semiconductor layer has been deposited to anneal the portion of the semiconductor layer.
    Type: Application
    Filed: February 1, 2023
    Publication date: August 1, 2024
    Inventors: Charles R. Lottes, Jeffrey L. Libbert, Qingmin Liu
  • Patent number: 11942360
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: March 26, 2024
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Patent number: 11887885
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: January 30, 2024
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Patent number: 11699615
    Abstract: A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: July 11, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Igor Peidous, Lu Fei, Jeffrey L. Libbert, Andrew M. Jones, Alex Usenko, Gang Wang, Shawn George Thomas, Srikanth Kommu
  • Publication number: 20230215759
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 6, 2023
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Patent number: 11626318
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: April 11, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Publication number: 20230062816
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Application
    Filed: October 19, 2022
    Publication date: March 2, 2023
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Patent number: 11587825
    Abstract: A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: February 21, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Igor Peidous, Jeffrey L. Libbert
  • Patent number: 11532501
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: December 20, 2022
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Patent number: 11380576
    Abstract: A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: July 5, 2022
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Igor Peidous, Jeffrey L. Libbert
  • Patent number: 11239107
    Abstract: A multilayer semiconductor on insulator structure is provided in which the handle substrate and an epitaxial layer in interfacial contact with the handle substrate comprise electrically active dopants of opposite type. The epitaxial layer is depleted by the handle substrate free carriers, thereby resulting in a high apparent resistivity, which improves the function of the structure in RF devices.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: February 1, 2022
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Gang Wang, Jeffrey L. Libbert, Shawn George Thomas, Qingmin Liu
  • Publication number: 20210384070
    Abstract: A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.
    Type: Application
    Filed: August 25, 2021
    Publication date: December 9, 2021
    Inventors: Igor Peidous, Lu Fei, Jeffrey L. Libbert, Andrew M. Jones, Alex Usenko, Gang Wang, Shawn George Thomas, Srikanth Kommu
  • Patent number: 11139198
    Abstract: A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: October 5, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Igor Peidous, Lu Fei, Jeffrey L. Libbert, Andrew M. Jones, Alex Usenko, Gang Wang, Shawn George Thomas, Srikanth Kommu
  • Publication number: 20210242075
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Application
    Filed: April 19, 2021
    Publication date: August 5, 2021
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Patent number: 11081407
    Abstract: Methods for assessing the quality of a semiconductor structure having a charge trapping layer to, for example, determine if the structure is suitable for use as a radiofrequency device are disclosed. Embodiments of the assessing method may involve measuring an electrostatic parameter at an initial state and at an excited state in which charge carriers are generated.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: August 3, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Igor Rapoport, Srikanth Kommu, Igor Peidous, Gang Wang, Jeffrey L. Libbert
  • Patent number: 11075109
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: July 27, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Publication number: 20210159114
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Application
    Filed: February 3, 2021
    Publication date: May 27, 2021
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Patent number: 10943813
    Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: March 9, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Michael R. Seacrist, Robert W. Standley, Jeffrey L. Libbert, Hariprasad Sreedharamurthy, Leif Jensen
  • Publication number: 20210035855
    Abstract: A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.
    Type: Application
    Filed: September 28, 2020
    Publication date: February 4, 2021
    Inventors: Igor Peidous, Jeffrey L. Libbert