Abstract: A method of operating a reactor apparatus during a deposition process includes controlling the reactor apparatus to initiate the deposition process; receiving temperature feedback signals from temperature sensors positioned in respective zones of the reactor apparatus; during each process step of at least two process steps: applying a respective set of offsets to the temperature feedback signals received from the temperature sensors, wherein the set of offsets applied for each process step are predetermined for the respective process step to control a characteristic of the semiconductor wafer following the respective process step; and transmitting power instructions to heating devices each positioned in one of the zones of the reactor apparatus, wherein the power instructions are determined by executing feedback control using the temperature feedback signals with the applied set of offsets and a target temperature for the respective process step.

Abstract: A method of preparing a semiconductor-on-insulator structure from a bonded structure including a handle substrate, a donor substrate including a cleave plane, and a dielectric layer positioned between the handle substrate and the donor substrate, the method includes cleaving the bonded structure at the cleave plane to form a cleaved structure including the handle substrate, the dielectric layer, and a device layer. The single crystal semiconductor device layer defines a damaged region at an exposed surface opposite the dielectric layer. The damaged region includes single crystal semiconductor material and extends a thickness from the exposed surface. The method also includes removing the damaged region from the cleaved structure using a clean-and-etch operation that includes contacting the exposed surface of the device layer with an alkaline solution at a temperature and for a duration sufficient to remove the damaged region and smoothing the device layer with the damaged region removed.

Abstract: Methods of preparing handle structures for use in semiconductor-on-insulator structures, and methods of preparing semiconductor-on-insulator structures, include forming a charge trapping layer on a front surface of a single crystal semiconductor handle substrate by depositing a semiconductor material on the front surface, where a semiconductor oxide layer is formed on the back surface and where, during deposition of the semiconductor material on the front surface, the semiconductor oxide layer limits deposition of the semiconductor material on the back surface. The semiconductor oxide layer has a sufficient thickness to withstand the deposition of the semiconductor material without exposing the back surface.

Abstract: A donor structure for use in preparing silicon-on-insulator structures includes a donor substrate made of single crystal silicon and a dielectric layer formed on a front surface of the donor substrate. The donor substrate has an interstitial oxygen concentration of less than 7.5×1017 atoms/cm3 and includes a denuded zone extending from the front surface of the donor substrate a denuded zone depth of at least 25 ?m. The denuded zone is characterized by non-detectable oxygen precipitates measured by light scattering tomography. The denuded zone depth enables the donor structure to be reclaimed for preparing multiple silicon-on-insulator structures.

Abstract: A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.

Abstract: A method of preparing a silicon-on-insulator structure includes forming an epitaxial silicon layer on a front surface of a single crystal silicon donor substrate, forming a dielectric layer on the epitaxial silicon layer to thereby form an epitaxial donor structure including the single crystal silicon donor substrate, the epitaxial silicon layer, and the dielectric layer, bonding the dielectric layer of the epitaxial donor structure to a front surface of a handle structure, the handle structure including a single crystal semiconductor handle substrate, to thereby form a bonded structure including the handle structure, the dielectric layer, the epitaxial silicon layer, and the single crystal silicon donor substrate, and removing the single crystal silicon donor substrate and a portion of the epitaxial silicon layer from the bonded structure to thereby form the silicon-on-insulator structure including the handle structure, the dielectric layer, and a silicon device layer.

Abstract: A method of preparing a multilayer structure includes providing a single crystal semiconductor handle substrate that includes a front surface, a back surface, a circumferential edge joining the front and back surfaces, and a central plane between the front and back surfaces. The single crystal semiconductor handle substrate has a minimum bulk region resistivity of at least about 500 Ohm-cm. The method also includes depositing a semiconductor layer on the front surface of the single crystal semiconductor handle substrate. Depositing the semiconductor layer is performed by two or more cycles of depositing a portion of the semiconductor layer and interrupting the deposition after the portion of the semiconductor layer has been deposited to anneal the portion of the semiconductor layer.

Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.

Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.

Abstract: A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.

Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.

Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.

Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.

Abstract: A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.

Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.

Abstract: A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.

Abstract: A multilayer semiconductor on insulator structure is provided in which the handle substrate and an epitaxial layer in interfacial contact with the handle substrate comprise electrically active dopants of opposite type. The epitaxial layer is depleted by the handle substrate free carriers, thereby resulting in a high apparent resistivity, which improves the function of the structure in RF devices.

Abstract: A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.

Abstract: A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.

Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.