Patents by Inventor Jeffrey M. Dodson

Jeffrey M. Dodson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150281126
    Abstract: A method of transferring data over a switch fabric with at least one switch with an embedded network class endpoint device is provided. At a device transmit driver a transfer command is received to transfer a message. If the message length is less than a threshold the message is pushed. If the message length is greater than the threshold, the message is pulled.
    Type: Application
    Filed: April 3, 2014
    Publication date: October 1, 2015
    Applicant: PLX Technology, Inc.
    Inventors: Jack REGULA, Jeffrey M. DODSON, Nagarajan SUBRAMANIYAN
  • Publication number: 20150254082
    Abstract: A method of remote booting over PCI Express using a synthetic remote boot capability is provided. A management host software system intercepts probe requests from a host and provided information required for a remote boot. The management host software system may include expansion ROM information to support different host architectures. A synthetic device booting capability may be shown to a host, including the expansion ROM information. Additional support for DHCP and TFTP may be provided.
    Type: Application
    Filed: March 10, 2014
    Publication date: September 10, 2015
    Applicant: PLX Technology, Inc.
    Inventors: Rajendran VISHWANATHAN, Nagarajan SUBRAMANIYAN, Jeffrey M. DODSON, Jack REGULA
  • Publication number: 20150127878
    Abstract: Tunneled window connections are utilized in a switch fabric to perform programmed input output transfers. The window connections are based on global IDs. A management entity may enforce the tunneled window connections, improving security.
    Type: Application
    Filed: November 6, 2013
    Publication date: May 7, 2015
    Applicant: PLX Technology, Inc.
    Inventors: Jack REGULA, Nagarajan SUBRAMANIYAN, Jeffrey M. DODSON
  • Publication number: 20150019789
    Abstract: A PCIe fabric includes at least one PCIe switch. The fabric may be used to connect multiple hosts. The PCIe switch implements security and segregation measures for host-to-host message communication. A management entity defines a Virtual PCIe Fabric ID (VPFID). The VPFID is used to enforce security and segregation. The fabric ID may be extended to be used in switch fabrics with other point-to-point protocols.
    Type: Application
    Filed: October 1, 2014
    Publication date: January 15, 2015
    Inventors: Nagarajan SUBRAMANIYAN, Jack REGULA, Jeffrey M. DODSON
  • Publication number: 20140237156
    Abstract: PCIe is a point-to-point protocol. A PCIe switch fabric has multi-path routing supported by adding an ID routing prefix to a packet entering the switch fabric. The routing is converted within the switch fabric from address routing to ID routing, where the ID is within a Global Space of the switch fabric. Rules are provided to select optimum routes for packets within the switch fabric, including rules for ordered traffic, unordered traffic, and for utilizing congestion feedback. In one implementation a destination lookup table is used to define the ID routing prefix for an incoming packet. The ID routing prefix may be removed at a destination host port of the switch fabric.
    Type: Application
    Filed: March 31, 2014
    Publication date: August 21, 2014
    Applicant: PLX Technology, Inc.
    Inventors: Jack REGULA, Jeffrey M. DODSON, Nagarajan SUBRAMANIYAN
  • Patent number: 5251164
    Abstract: A high-speed, area efficient, low-power absolute value arithmetic unit that efficiently produces the absolute value of the difference of two input operands. This arithmetic unit is adaptable to provide other output functions. Further, the arithmetic unit of the present invention may be utilized as a data path element in a high performance floating point arithmetic unit. The present invention includes a propagate and generate block, a carry-chain-and a difference multiplexer. Operands A and B are received by the absolute value arithmetic unit. The propagate and generate block converts operands A and B into propagate signals and generate signals. The carry-chain-receives propagate and generate signals and produces carry-chain-propagate signals and carry-chain-generate signals for every bit, where the most significant carry-chain-generate signal is used to indicate a borrow.
    Type: Grant
    Filed: May 22, 1992
    Date of Patent: October 5, 1993
    Assignee: S-MOS Systems, Inc.
    Inventors: Jeffrey M. Dodson, Christopher T. Cheng