Patents by Inventor Jeffrey M. Levy

Jeffrey M. Levy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6667183
    Abstract: An anti-reflective layer is formed on the sidewalls of metal interconnects in an integrated circuit containing photodetector devices. After fabricating the photodetector devices, the metal interconnects are formed. An anti-reflective layer is formed over the interconnects and is directionally etched so that a portion of the anti-reflective layer remains covering the interconnect sidewalls, thereby reducing optical cross-talk in the photodetector devices due to sidewall reflection.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: December 23, 2003
    Assignee: Tower Semicondcutor Ltd.
    Inventor: Jeffrey M. Levy
  • Patent number: 6535659
    Abstract: An integrated waveguide array structure allows electrical testing of each unit for shorts between waveguide elements of the array, and shorts between waveguides and the substrate prior to assembly into a larger optico-electronic unit. Multiple waveguide array structures are formed on a wafer, each waveguide array being provided with a cross bar connected to an electrical contact at each end, such that alternate waveguide elements of the array are electrically connected. When connected to a suitable testing device, the existence of shorts between adjacent elements can be immediately detected. Following testing, the cross bar and electrical contact are removed by scribing.
    Type: Grant
    Filed: January 9, 2001
    Date of Patent: March 18, 2003
    Assignee: Chiaro Networks Ltd.
    Inventor: Jeffrey M. Levy
  • Publication number: 20030007716
    Abstract: An integrated waveguide array structure allows electrical testing of each unit for shorts between waveguide elements of the array, and shorts between waveguides and the substrate prior to assembly into a larger optico-electronic unit. Multiple waveguide array structures are formed on a wafer, each waveguide array being provided with a cross bar connected to an electrical contact at each end, such that alternate waveguide elements of the array are electrically connected. When connected to a suitable testing device, the existence of shorts between adjacent elements can be immediately detected. Following testing, the cross bar and electrical contact are removed by scribing.
    Type: Application
    Filed: January 9, 2001
    Publication date: January 9, 2003
    Applicant: CHIARO NETWORKS LTD.
    Inventor: Jeffrey M. Levy
  • Publication number: 20020005531
    Abstract: An anti-reflective layer is formed on the sidewalls of metal interconnects in an integrated circuit containing photodetector devices. After fabricating the photodetector devices, the metal interconnects are formed. An anti-reflective layer is formed over the interconnects and is directionally etched so that a portion of the anti-reflective layer remains covering the interconnect sidewalls, thereby reducing optical cross-talk in the photodetector devices due to sidewall reflection.
    Type: Application
    Filed: August 27, 2001
    Publication date: January 17, 2002
    Inventor: Jeffrey M. Levy
  • Patent number: 6288434
    Abstract: An anti-reflective layer is formed on the sidewalls of metal interconnects in an integrated circuit containing photodetector devices. After fabricating the photodetector devices, the metal interconnects are formed. An anti-reflective layer is formed over the interconnects and is directionally etched so that a portion of the anti-reflective layer remains covering the interconnect sidewalls, thereby reducing optical cross-talk in the photodetector devices due to sidewall reflection.
    Type: Grant
    Filed: May 14, 1999
    Date of Patent: September 11, 2001
    Assignee: Tower Semiconductor, Ltd.
    Inventor: Jeffrey M. Levy
  • Patent number: 6285065
    Abstract: Light transmitting filter elements are formed in holes etched in a covering passivation layer overlying light sensing devices formed in an integrated circuit. Filter material is spun on to the wafer to fill the etched holes. The filter material is cured and etched back below the passivation layer top surface. Subsequent filter materials transmitting different light frequencies may be similarly spun on to fill subsequently etched holes, cured, and etched back to form additional filter elements. A contiguous structure of individual filter elements may be formed.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: September 4, 2001
    Assignee: Tower Semiconductor, Ltd.
    Inventor: Jeffrey M. Levy