Patents by Inventor Jeffrey Oliver Thomas

Jeffrey Oliver Thomas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hardware-accelerated high availability integrated networked storage system
    Patent number: 8099474
    Abstract: Disclosed is a system and methods for acceleration of the TCP/IP and the iSCSI protocols. The methods may be adapted to a wide variety of systems and applications that employ communications protocols including TCP, with or without iSCSI. Using a hardware-based acceleration approach, common case network traffic is rapidly processed at near line rate thereby improving overall performance and alleviating processing bottlenecks.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: January 17, 2012
    Assignee: Promise Technology, Inc.
    Inventors: Roger Thorpe, Jeffrey Oliver Thomas, Itsik Yomorta, Ting-Kuo Yu, Erasmo Javier Brenes
  • HARDWARE-ACCELERATED HIGH AVAILABILITY INTEGRATED NETWORKED STORAGE SYSTEM
    Publication number: 20100235465
    Abstract: Disclosed is a system and methods for acceleration of the TCP/IP and the iSCSI protocols. The methods may be adapted to a wide variety of systems and applications that employ communications protocols including TCP, with or without iSCSI. Using a hardware-based acceleration approach, common case network traffic is rapidly processed at near line rate thereby improving overall performance and alleviating processing bottlenecks.
    Type: Application
    Filed: September 21, 2009
    Publication date: September 16, 2010
    Applicant: iStor Networks, Inc.
    Inventors: Roger Thorpe, Jeffrey Oliver Thomas, Itsik Yomorta, Ting-Kuo Yu, Erasmo Javier Brenes
  • Hardware-accelerated high availability integrated networked storage system
    Patent number: 7594002
    Abstract: Disclosed is a system and methods for acceleration of the TCP/IP and the iSCSI protocols. The methods may be adapted to a wide variety of systems and applications that employ communications protocols including TCP, with or without iSCSI. Using a hardware-based acceleration approach, common case network traffic is rapidly processed at near line rate thereby improving overall performance and alleviating processing bottlenecks.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: September 22, 2009
    Assignee: Istor Networks, Inc.
    Inventors: Roger Thorpe, Jeffrey Oliver Thomas, Itsik Yomorta, Ting-Kuo Yu, Erasmo Javier Brenes
  • Method and apparatus for calculating X to the Exponent of Y
    Patent number: 6128638
    Abstract: A hardware implementation solves for the value of X.sup.Y, where X and Y are real (fixed point or floating point) numbers by using the formula X.sup.Y =exp (log.sub.e (X.sup.Y))=exp(ln(X.sup.Y))=exp(Y*ln(X)). A fixed point representation of X, output from a flip-flop, is used to address a floating point data output from an ln(X) ROM lookup table. The floating point data output is output from a second flip-flop and multiplied by Y in a multiplier to yield a product. The product is output from a third flip-flop to address a fixed point data output from an exp(X) ROM lookup table. The fixed point data output is latched by and output from a third flip-flop. The fixed point data output approximates X.sup.Y, using a minimal amount of die area on the semiconductor and minimal amount of processing power. Also, the present invention can be fully pipelined, such that one calculation can be conducted every cycle and operations can occur simultaneously.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: October 3, 2000
    Assignee: Silicon Graphics, Inc.
    Inventor: Jeffrey Oliver Thomas