Patents by Inventor Jeffrey P. Christenson

Jeffrey P. Christenson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multi-processor module
    Patent number: 7475175
    Abstract: An apparatus comprises a plurality of logically independent processors, a system bus, and a cache control and bus bridge device in communication with the plurality of processors such that the cache control and bus bridge device is logically interposed between the processors and the system bus, and wherein the processors and cache control and bus bridge device are disposed in a module form factor such that the apparatus is a drop-in replacement for a standard single processor module.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: January 6, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: David A. Klein, Christian L. Belady, Shaun L. Harris, Michael C. Day, Jeffrey P. Christenson, Brent A. Boudreaux, Stuart C. Haden, Eric Peterson, Jeffrey N. Metcalf, James S. Wells, Gary W. Williams, Paul A. Wirtzberger, Roy M. Zeighami, Greg Huff
  • Multi-processor module with redundant power
    Patent number: 7280365
    Abstract: One embodiment includes an electronic assembly having a first printed circuit board (PCB) and a second PCB having at least two processors. The second PCB is coupled to and disposed above the first PCB. A thermal dissipation device dissipates heat away from the processors. First and second power modules supply power to the second PCB and are separated and redundant power supplies such that upon failure of the first power module, the second power module can provide power for both power modules to the second PCB.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: October 9, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Steven A. Belson, Shaun L. Harris, Eric C. Peterson, Gary W. Williams, Christian L. Belady, Jeffrey P. Christenson
  • Apparatus and method for multiprocessor circuit board
    Patent number: 7280364
    Abstract: One embodiment includes an electronic assembly having a first printed circuit board (PCB) coupled to a second PCB. The second PCB has at least two processors and is disposed above the first PCB. A thermal dissipation device is disposed above the second PCB, dissipates heat away from the two processors, and provides an airflow path. A power system is adjacent the thermal dissipation device and in a pathway of the airflow path.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: October 9, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shaun L. Harris, Steven A. Belson, Eric C. Peterson, Gary W. Williams, Christian L. Belady, Jeffrey P. Christenson
  • Redundant power for processor circuit board
    Patent number: 7064955
    Abstract: One embodiment includes an electronic assembly having a first printed circuit board (PCB) and a second PCB. The second PCB has at least one processor coupled to and disposed above the first PCB. A thermal dissipation device is disposed above the second PCB, dissipates heat away from the processor, and provides an airflow path. First and second power systems are coupled to the second PCB and in a pathway of the airflow path. The first and second power systems are redundant such that upon failure of the first power system, the second power system can provide power for both power systems.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: June 20, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shaun L. Harris, Steven A. Belson, Eric C. Peterson, Gary W. Williams, Christian L. Belady, Jeffrey P. Christenson
  • Multi-processor module
    Publication number: 20040225821
    Abstract: An apparatus comprises a plurality of logically independent processors, a system bus, and a cache control and bus bridge device in communication with the plurality of processors such that the cache control and bus bridge device is logically interposed between the processors and the system bus, and wherein the processors and cache control and bus bridge device are disposed in a module form factor such that the apparatus is a drop-in replacement for a standard single processor module.
    Type: Application
    Filed: March 15, 2004
    Publication date: November 11, 2004
    Inventors: David A. Klein, Christian L. Belady, Shaun L. Harris, Michael C. Day, Jeffrey P. Christenson, Brent A. Boudreaux, Stuart C. Haden, Eric Peterson, Jeffrey N. Metcalf, James S. Wells, Gary W. Williams, Paul A. Wirtzberger, Roy M. Zeighami, Greg Huff