Abstract: A circuit board includes a substrate defining a substantially planar surface, a first electrical component, a second electrical component, and an interconnect. The first electrical component is coupled to the substrate. The second electrical component is spaced from the first electrical component and is coupled to the substrate. The interconnect is formed on the substantially planar surface of the substrate and extends between the first electrical component and the second electrical component. The interconnect is formed by at least two layers of a conductive material.

Abstract: An interconnect for connecting an integrated circuit to an optical interface subsystem includes a first optical transmitter disposed in the integrated circuit and operable to transmit light signals to the optical interface subsystem, a first optical receiver disposed in the optical interface subsystem and operable to receive light signals from the first optical transmitter, a second optical transmitter disposed in the optical interface subsystem and operable to transmit light signals to the integrated circuit, and a second optical receiver disposed in the integrated circuit and operable to receive light signals from the second optical transmitter.

Abstract: A method for cooling a circuit comprises generating movement of fluid along a path through a closed-loop system. The method further comprises inducing turbulence in the fluid by movement of at least a portion of a turbulence-inducing device arranged in the path, and dissipating thermal energy from the circuit by the fluid. A system comprises a circuit, and a closed-loop cooling system comprising fluid for cooling the circuit and at least one active turbulence-inducing device. In one embodiment, the turbulence-inducing device is a microelectromechanical system (MEMS) device. In one embodiment, the MEMS device is solely responsible for bulk fluid movement through the closed-loop cooling system.

Abstract: A circuit board includes a substrate defining a substantially planar surface, a first electrical component, a second electrical component, and an interconnect. The first electrical component is coupled to the substrate. The second electrical component is spaced from the first electrical component and is coupled to the substrate. The interconnect is formed on the substantially planar surface of the substrate and extends between the first electrical component and the second electrical component. The interconnect is formed by at least two layers of a conductive material.

Abstract: Data is compressed/decompressed according to the address location of data entries contained within a dictionary built in a content addressable memory 88. During data compression, character combinations which have not previously occurred within the input data stream are encoded as new data entries within the dictionary. When the character string OMEGA-K fails to match any existing dictionary entry, the address of the data entry (OMEGA) is output as a codeword representing the matched portion of the character string and OMEGA-K are stored in a new address location for later use. In compression, update circuitry 84 allows a memory search and a data write to be performed during the same clock cycle. Compressed data strings are decompressed by using the compressed data characters as addresses for link list traversal of the decompression dictionary. The data entry addressed by the data character is output if it does not require further decompression.

Abstract: A class of lossless data compression algorithms use a memory-based dictionary of finite size to facilitate the compression and decompression of data. To reduce the loss in data compression caused by dictionary resets, a standby dictionary is used to store a subset of encoded data entries previously stored in a current dictionary. In a second aspect of the invention, data is compressed/decompressed according to the address location of data entries contained within a dictionary built in a content addressable memory (CAM). In a third aspect of the invention, the minimum memory/high compression capacity of the standby dictionary scheme is combined with the fast single-cycle per character encoding/decoding capacity of the CAM circuit. In a fourth aspect of the invention, a selective overwrite dictionary swapping technique is used to allow all data entries to be used at all times for encoding character strings.

Abstract: A class of lossless data compression algorithms use a memory-based dictionary of finite size to facilitate the compression and decompression of data. To reduce the loss in data compression caused by dictionary resets, a standby dictionary is used to store a subset of encoded data entries previously stored in a current dictionary. In a second aspect of the invention, data is compressed/decompressed according to the address location of data entries contained within a dictionary built in a content addressable memory (CAM). In a third aspect of the invention, the minimum memory/high compression capacity of the standby dictionary scheme is combined with the fast single-cycle per character encoding/decoding capacity of the CAM circuit. The circuit uses multiple dictionaries within the storage locations of a CAM to reduce the amount of memory required to provide a high data compression ratio.

Abstract: A logic circuit in an integrated circuit implementation of an adaptive data compression algorithm which uses a RAM to store dictionary entries. The logic circuit generates predetermined codewords for single-character strings without accessing the dictionary. The logic circuit also generates single-character strings for corresponding codewords without accessing the dictionary.