Abstract: A semiconductor package and a method of manufacturing thereof is disclosed. The package includes a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The package includes a dam structure configured to protect components of the semiconductor package from contamination.

Abstract: A method for forming a semiconductor package is disclosed. The method includes providing a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The protective cover is supported by a standoff structure disposed on the die and below the protective cover. An encapsulant is disposed to cover the package substrate while leaving the top package surface exposed.

Abstract: A semiconductor package is disclosed. The package includes a package substrate having top and bottom major package substrate surfaces, the top major package surface including a die region. A die having first and second major die surfaces is attached onto the die region. The second major die surface is attached to the die region. The first major die surface includes a sensor region and a cover adhesive region surrounding the sensor region. The package also includes a cover adhesive to the cover adhesive region on the first major die surface. A protective cover with first and second major cover surfaces and side surfaces is attached to the die using the cover adhesive. The second major cover surface contacts the cover adhesive. The protective cover covers the sensor region. The protective cover includes a cover attached to the first major die surface, the cover includes top and bottom major cover surfaces and side cover surfaces.

Abstract: A semiconductor package is disclosed. The package includes a sensor die which is disposed on a package substrate. A cover structure is attached to a cover adhesive surrounding the sensor die, forming a cavity above the sensor die. The cover structure includes a primary cover structure and a secondary cover structure surrounding the primary cover structure. The secondary cover structure is configured to protect the primary cover structure from damage during packaging. The package also includes an encapsulant. The encapsulant covers side surfaces of the cover structure, sides of the cover adhesive, and exposed portions of the package substrate, leaving the first major cover surface exposed.

Abstract: A semiconductor device has a substrate. A semiconductor die with a photosensitive circuit is disposed over the substrate. A lens comprising a protective layer is disposed over the photosensitive circuit. An encapsulant is deposited over the substrate, semiconductor die, and lens. The protective layer is removed after depositing the encapsulant.

Abstract: A semiconductor device has a substrate. A semiconductor die including a photosensitive circuit is disposed over the substrate. A shield is disposed over the substrate and semiconductor die with a first opening of the shield disposed over the photosensitive circuit. An outer section of the shield is attached to the substrate and includes a second opening. An encapsulant is deposited over the substrate and semiconductor die. The encapsulant extends into the first opening and a first area between the shield and substrate while a second area over the photosensitive circuit remains devoid of the encapsulant.

Abstract: A semiconductor package and a method of manufacturing thereof is disclosed. The package includes a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The package includes a dam structure configured to protect components of the semiconductor package from contamination.

Abstract: A semiconductor package and a method of manufacturing thereof is disclosed. The package includes a package substrate having a die attach region with a die attached thereto. A protective cover with a cover adhesive is disposed over a sensor region of the die and attached to the die by the cover adhesive. The cover adhesive is disposed in a cap bonding region of the protective cover.

Abstract: A semiconductor package and method for forming thereof are disclosed. The package includes a package substrate having a die region with a die attached thereto. An encapsulant is disposed to cover encapsulation region of the package substrate. A protective cover is disposed over the die and attached to the encapsulant by a cover adhesive. The protective cover is supported by a lower portion of step shaped inner encapsulant sidewalls.

Abstract: A semiconductor package is disclosed. The package includes a package substrate having top and bottom major package substrate surfaces, the top major package surface including a die region. A die having first and second major die surfaces is attached onto the die region. The second major die surface is attached to the die region. The first major die surface includes a sensor region and a cover adhesive region surrounding the sensor region. The package also includes applying a cover adhesive to the cover adhesive region on the first major die surface. A protective cover with first and second major cover surfaces and side surfaces is attached to the die using the cover adhesive. The second major cover surface contacts the cover adhesive. The protective cover covers the sensor region. The protective cover includes a recessed structure on the second major cover surface.

Abstract: A method for forming a semiconductor package is disclosed. The method includes providing a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The protective cover is supported by a standoff structure disposed on the die and below the protective cover. An encapsulant is disposed to cover the package substrate while leaving the top package surface exposed.

Abstract: An integrated circuit package system is provided forming a ring above a paddle and an external interconnect, mounting an integrated circuit die on the paddle, connecting the integrated circuit die and the external interconnect, the external interconnect and the ring, and the ring and the integrated circuit die, and encapsulating the integrated circuit die, the ring, and a portion of the external interconnect and the paddle.

Abstract: An integrated circuit package system includes forming a multi-tier substrate, and attaching a plurality of integrated circuits on the multi-tier substrate.

Abstract: A non-leaded integrated circuit package system is provided providing a die paddle of a lead frame, forming a dual row of terminals including an outer terminal and an inner terminal, and selectively fusing an inner terminal and an adjacent inner terminal to form a fused lead.

Abstract: The present invention provides an integrated circuit package system with die on base package comprising forming a base package comprising, forming a substrate, mounting a first integrated circuit on the substrate, encapsulating the integrated circuit and the substrate with a molding compound, and testing the base package, attaching a bare die to the base package, connecting electrically the bare die to the substrate and encapsulating the bare die and the base package.

Abstract: An integrated circuit package system is provided forming an external interconnect from a padless lead frame, encapsulating a heat sink and the external interconnect, mounting an integrated circuit die on the heat sink, and encapsulating the integrated circuit die, the heat sink, and the external interconnect.

Abstract: A semiconductor including a leadframe having a die attach paddle and a number of leads is provided. The die attach paddle has a recess to provide a number of mold dams around the periphery of the die attach paddle. An integrated circuit is positioned in the recess. Electrical connections between the integrated circuit and the number of leads are made, and an encapsulant is formed over the integrated circuit and around the number of mold dams.

Abstract: An integrated circuit non-leaded package system is provided including: forming a plurality of leads with a predetermined thickness and a predetermined interval gap between each of the plurality of leads; configuring each one of the plurality of leads to include first terminal ends disposed adjacent an integrated circuit and second terminal ends disposed along a periphery of a package; and forming the second terminal ends of alternating leads disposed along the periphery of the package to form a lead-to-lead gap between adjacent leads in excess of the predetermined interval gap.

Abstract: An integrated circuit package system including forming a leadframe having a lead with a leadfinger support of a predetermined height, and attaching an integrated circuit die with an electrical interconnect at a predetermined collapse height determined by the predetermined height of the leadfinger support.

Abstract: An integrated circuit package system is provided. A leadframe is provided having a die-attach pad. Elevated buttons are formed on the top surface of the die-attach pad configured to support an IC die in an elevated position thereon.