Patents by Inventor Jeffrey Putnam

Jeffrey Putnam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080317185
    Abstract: The clock generating portion of a communication system includes a low-power, high-jitter phase locked loop (PLL) and a high-power, low-jitter PLL. Control logic within the chip allows for selective switching between the low-power and high-power PLL for receiving the broadcast signals, such as mobile TV signals. The switching may occur in a manner that is dependent on the conditions of the wireless channel and/or the complexity of the modulation scheme being used. The switching may be used to provide an oscillating signal from one or both of the PLLs to a receiver to be used to receive communication signals. The control logic may power off one of the PLLs to save power when not in use.
    Type: Application
    Filed: October 18, 2007
    Publication date: December 25, 2008
    Applicant: BROADCOM CORPORATION
    Inventors: Stephen A. Mueller, Jeffrey Putnam, Xuguang (Gary) Zhang
  • Publication number: 20070291891
    Abstract: A clock signal regeneration system and method to adjust the phase of a frequency-locked clock signal is provided. The system includes a numerically controlled oscillator, a clock source, and an adder. In one embodiment, additional components are included in the system to ensure that underflow or overflow of the numerically controlled oscillator is prevented. In another embodiment, additional components are included to ensure that output pulses from the numerically controlled oscillator do not occur within a minimum time interval. The method includes deriving a phase adjustment factor, adding the phase adjustment factor to a frequency control word, providing the modified frequency control word to a numerically controlled oscillator and generating a phase shifted, frequency-locked output signal.
    Type: Application
    Filed: August 24, 2007
    Publication date: December 20, 2007
    Applicant: Broadcom Corporation
    Inventors: Tak Lee, Jeffrey Putnam, James Cavallo
  • Publication number: 20050171986
    Abstract: Methods and apparatus for reducing precision of an input signal, by comparing a portion of the input signal to a preselected threshold value, and determining a selectable bias responsive to the comparison. By combining a portion of the input signal with the selectable bias, a reduced precision signal, having minimized or eliminated rounding error, is generated. The selectable bias corresponds to a predetermined characteristic of one of bias, an error signal, the input datum, the reduced precision datum, and a combination thereof.
    Type: Application
    Filed: March 28, 2005
    Publication date: August 4, 2005
    Inventors: Tracy Denk, Jeffrey Putnam