Patents by Inventor Jeffrey R. Brown
Jeffrey R. Brown has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942217Abstract: A system including a range of motion, quality of sleep, overall, and control modules. The range of motion module, prior to a procedure being performed on a patient, determines a first range of motion score of the patient based on a first signal generated by a sensor. The quality of sleep module, prior to the procedure being performed on the patient, determines a first quality of sleep score or a first pain score based on the first signal. The overall module determines a combined score based on the first range of motion score and the first quality of sleep score or the first pain score. The control module compares the combined score to a predetermined threshold and predicts an outcome of the procedure based on the comparison. The control module, based on the combined score, determines whether to perform the procedure, adjust the procedure or refrain from performing the procedure.Type: GrantFiled: November 5, 2021Date of Patent: March 26, 2024Assignee: WARSAW ORTHOPEDIC, INC.Inventors: Randal Schulhauser, Richard L. Brown, Matthew M. Morrison, Patrick W. Kinzie, Jeffrey R. VanRaaphorst, Emily C. Byrne
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Patent number: 11905860Abstract: A latch assembly comprises a latch pin and a cage. The latch pin comprises a latch nose and a pin body. The pin body comprises an outer surface and an inner compartment. The inner compartment comprises a first inner wall segmented by a first slot and a second inner wall segmented by a second slot. The first slot and the second slot vent out of the inner compartment. The cage comprises a stepped base and a shaft extending from the stepped base into the inner compartment. The shaft comprises a first exterior flat adjoining the first inner wall and a second exterior flat adjoining the second inner wall. A spring can be biased against the latch pin and the cage. The latch assembly can be used in a latching device of a valvetrain such as a switching roller finger follower or other rocker arm.Type: GrantFiled: November 20, 2020Date of Patent: February 20, 2024Assignee: EATON INTELLIGENT POWER LIMITEDInventors: Jeffrey R. Brown, Matthew A. Vance
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Publication number: 20220412232Abstract: A latch assembly comprises a latch pin and a cage. The latch pin comprises a latch nose and a pin body. The pin body comprises an outer surface and an inner compartment. The inner compartment comprises a first inner wall segmented by a first slot and a second inner wall segmented by a second slot. The first slot and the second slot vent out of the inner compartment. The cage comprises a stepped base and a shaft extending from the stepped base into the inner compartment. The shaft comprises a first exterior flat adjoining the first inner wall and a second exterior flat adjoining the second inner wall. A spring can be biased against the latch pin and the cage. The latch assembly can be used in a latching device of a valvetrain such as a switching roller finger follower or other rocker arm.Type: ApplicationFiled: November 20, 2020Publication date: December 29, 2022Applicant: EATON INTELLIGENT POWER LIMITEDInventors: Jeffrey R. Brown, Matthew A. Vance
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Publication number: 20220228516Abstract: A switching roller finger follower (SRFF) for valve actuation includes an outer arm (16), a first inner arm (12), a bearing axle (50) and a latch pin (26). The outer arm (16) is formed of a metal stamping, and is pivotally coupled to a main axle (40). The first inner arm (12) is coupled to the main axle (40) and is pivotably secure to the outer arm. The bearing axle (50) extends through the outer arm and the first inner arm. The bearing axle supports a roller (20) thereon. The latch pin (26) is slidably disposed in the outer arm (16) and is movable between at least a first position where the outer arm (16) and the first inner arm (12) are coupled for concurrent rotation and a second position wherein one of the outer arm and the first inner arm are configured to rotate relative to the other arm.Type: ApplicationFiled: May 22, 2020Publication date: July 21, 2022Applicant: Eaton Intelligent Power LimitedInventors: Emanuele Raimondi, Massimo D'Amore, Jeffrey R. Brown, Ramy Rezkalla, Matthew A. Vance, Andrei D. Radulescu, Brandon J. Elliott
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Patent number: 9430373Abstract: Memory system controllers can include a switch and non-volatile memory control circuitry coupled to the switch. The non-volatile memory control circuitry can include a channel control circuit coupled to logical units. The channel control circuitry can be configured to relay an erase command to a first one of the logical units and relay a particular command from the switch to a second one of the logical units while the erase command is being executed on the first one of the plurality of logical units.Type: GrantFiled: September 24, 2013Date of Patent: August 30, 2016Assignee: Micron Technology, Inc.Inventors: Douglas A. Larson, Jeffrey R. Brown
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Publication number: 20140025876Abstract: Memory system controllers can include a switch and non-volatile memory control circuitry coupled to the switch. The non-volatile memory control circuitry can include a channel control circuit coupled to logical units. The channel control circuitry can be configured to relay an erase command to a first one of the logical units and relay a particular command from the switch to a second one of the logical units while the erase command is being executed on the first one of the plurality of logical units.Type: ApplicationFiled: September 24, 2013Publication date: January 23, 2014Applicant: Micron Technology, Inc.Inventors: Douglas A. Larson, Jeffrey R. Brown
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Patent number: 8543758Abstract: Memory system controllers can include a switch and non-volatile memory control circuitry coupled to the switch. The non-volatile memory control circuitry can include a channel control circuit coupled to logical units. The channel control circuitry can be configured to relay an erase command to a first one of the logical units and relay a particular command from the switch to a second one of the logical units while the erase command is being executed on the first one of the plurality of logical units.Type: GrantFiled: May 31, 2011Date of Patent: September 24, 2013Assignee: Micron Technology, Inc.Inventors: Douglas A. Larson, Jeffrey R. Brown
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Publication number: 20120311230Abstract: Memory system controllers can include a switch and non-volatile memory control circuitry coupled to the switch. The non-volatile memory control circuitry can include a channel control circuit coupled to logical units. The channel control circuitry can be configured to relay an erase command to a first one of the logical units and relay a particular command from the switch to a second one of the logical units while the erase command is being executed on the first one of the plurality of logical units.Type: ApplicationFiled: May 31, 2011Publication date: December 6, 2012Applicant: Micron Technology, Inc.Inventors: Douglas A. Larson, Jeffrey R. Brown
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Patent number: 6824013Abstract: A cooler and dispenser for use with upright water bottles operates to (1) pump chilled water from a vertical bottle through a top opening, (2) filter the air that is drawn in to replace the water, (3) and provide the user with an indication of the level in the bottle. The dispenser cap is designed to fit snugly over the top of standard 3.0 and 5.0 gallon refillable water bottles in the vertical orientation. A small pump in the dispenser cap draws water from the bottom of the bottle and dispenses it through a tube that extends past the side of the bottle. The vacuum created within the bottle during the pumping process draws air in through a filter that keeps foreign particles from entering the bottle. Further, the airflow through the filter is constricted so as to ensure that a partial vacuum exists even after the pump has been turned off, and this draws residual water back through the delivery tube thereby preventing drips.Type: GrantFiled: December 23, 2002Date of Patent: November 30, 2004Inventors: Howard R. Harrison, Jeffrey R. Brown
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Publication number: 20030106907Abstract: A cooler and dispenser for use with upright water bottles operates to (1) pump chilled water from a vertical bottle through a top opening, (2) filter the air that is drawn in to replace the water, (3) and provide the user with an indication of the water level in the bottle. The dispenser cap is designed to fit snugly over the top of standard 3.0 and 5.0 gallon refillable water bottles in the vertical orientation. A small pump in the dispenser cap draws water from the bottom of the bottle and dispenses it through a tube that extends past the side of the bottle. The vacuum created within the bottle during the pumping process draws air in through a filter that keeps foreign particles from entering the bottle. Further, the airflow through the filter is constricted so as to ensure that a partial vacuum exists even after the pump has been turned off, and this draws residual water back through the delivery tube thereby preventing drips.Type: ApplicationFiled: December 23, 2002Publication date: June 12, 2003Inventors: Howard R. Harrison, Jeffrey R. Brown
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Publication number: 20020121096Abstract: A compact cooler/ice maker is taught which is capable of maintaining a uniform cooling or freezing temperature using a heat conductive liner continuous over a bottom liner wall and front, rear and side linear walls. Also taught is a means to provide a small forward voltage when the thermoelectric module is turned off, to prevent back flow through the heat sink. Also taught is a cooler with a beverage dispensing door located proximal to the bottom of said front and with inside walls adapted to form a beverage stack.Type: ApplicationFiled: May 1, 2002Publication date: September 5, 2002Inventors: Howard R. Harrison, Jeffrey R. Brown
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Patent number: 6401461Abstract: A compact combination ice maker and cooler is taught which is capable of maintaining a uniform freezing or cooling temperature across the surface of a heat conductive liner continuous over bottom liner wall and, front, rear, and side walls. Also taught is a means to provide an intermediate heat sink to assist in maintaining the uniform freezing or cooling temperature upon the introduction of a new thermal load, and a means to provide a small forward voltage when the thermoelectric module is turned off in order to prevent the back flow of heat through the thermoelectric module. Also taught is a cooler with a combination beverage inspection/dispensing door located proximal to the bottom of said front and with inside walls adapted to form a beverage stack and contoured to maintain improved thermal communication with the bottommost beverage can.Type: GrantFiled: March 10, 2000Date of Patent: June 11, 2002Inventors: Howard R. Harrison, Jeffrey R. Brown
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Patent number: 6385686Abstract: One embodiment of the present invention provides a system that supports multiple delayed read transactions. The system includes a host bus and a peripheral bus. The system also includes a receiving mechanism that is configured to receive a first request and a pipelined request that originate from the host bus and are directed to the peripheral bus. The first request and the pipelined request are stored in a first buffer and a second buffer. The system additionally includes a sending mechanism that is configured to send the first request to the peripheral bus, so that the first request is processed when the peripheral bus becomes available. If the pipelined request is received and if the pipelined request is a read operation, the sending mechanism is configured to send the pipelined request to the peripheral bus, so that the pipelined request will be processed when the peripheral bus becomes available.Type: GrantFiled: July 13, 1999Date of Patent: May 7, 2002Assignee: Micron Technology, Inc.Inventor: Jeffrey R. Brown
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Patent number: 6381667Abstract: One embodiment of the present invention provides a method that supports multiple delayed read transactions between a host bus and a peripheral bus in a computer system. The method operates by receiving a first request that is a read operation from the host bus that is directed to the peripheral bus. The first request is stored in a first buffer and sent to the peripheral bus, so that the first request will be processed when the peripheral bus becomes available. Next, the system waits to receive a pipelined request that is a read operation from the host bus that is directed to the peripheral bus. If such a pipelined request is received, the system stores the pipelined request in a second buffer, and sends the pipelined request to the peripheral bus, so that the pipelined request will be processed when the peripheral bus becomes available. Next, the system issues a retry request across the host bus.Type: GrantFiled: July 13, 1999Date of Patent: April 30, 2002Assignee: Micron Technology, Inc.Inventor: Jeffrey R. Brown
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Patent number: 6367064Abstract: A method and computer readable medium are provided for analyzing the integrity of a sensitivity list for a process statement in a hardware description language file. An example of a hardware description language to which the method can be applied is VHDL. The method compares an actual sensitivity list from a hardware description language file to an expected sensitivity list that includes one or more parameters expected to appear in the actual sensitivity list. In the event the actual sensitivity list deviates from the expected sensitivity list, the integrity of the actual sensitivity lists is compromised. In this case, an advisory can be generated to identify the deviation, and note its location within the hardware description language file. In this manner, the designer can quickly find the defective sensitivity list and correct it prior to simulation. A sensitivity list verification method can significantly reduce the time and effort involved in sensitivity list debugging.Type: GrantFiled: May 22, 1998Date of Patent: April 2, 2002Assignee: Micron Technology, Inc.Inventor: Jeffrey R. Brown
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Publication number: 20020029498Abstract: A rapid cool iron has a body and a low specific heat sole plate having an element bonded to or formed upon a top surface, said body and said sole plate being separated by an air gap to allow for the free flow of air over said top surface of said sole plate. Also taught is a fan to more rapidly cool the sole plate through forced convection. Also taught is a controller that is configured to only apply power when the rapid cool iron is in a horizontal orientation. Also taught is a steam generator which may be independent from or integrated with the sole plate, an external water reservoir/stand which includes a water filter, an ergonomically designed tilt handle with integrated controls and a grip sensor, and a forward facing light to illuminate the material being ironed.Type: ApplicationFiled: July 3, 2001Publication date: March 14, 2002Inventors: Howard Harrison, Jeffrey R. Brown
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Patent number: 6327692Abstract: One embodiment of the present invention provides a method for designing a circuit that limits the impact of design changes within a module of a circuit to the characteristics of signals flowing between modules of the circuit. This method operates by dividing the circuit into a plurality of circuit modules, and defining a plurality of interface modules located between the plurality of circuit modules. These interface modules include drivers coupled between upstream circuit module outputs and downstream circuit module inputs, so as to isolate the downstream circuit module inputs from the upstream circuit module outputs. Next, the circuit modules and interface modules are designed, and a synthesized circuit is ultimately generated from the designs. This synthesized circuit is then verified for characteristics such as timing. If it fails to verify, design changes are made.Type: GrantFiled: September 15, 2000Date of Patent: December 4, 2001Assignee: Micron Technology, Inc.Inventor: Jeffrey R. Brown
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Patent number: 6237007Abstract: A method and computer readable medium are provided for analyzing the integrity of a port list for a component and instantiated modules in a hardware description language file. An example of a hardware description language to which the method and the computer readable medium can be applied is VHDL. The method compares the port lists for a component and associated modules. In the event the component port list and module port list differ, an advisory can be generated to indicated a potential error. The advisory can identify the deviation, and note its location within the hardware description language file. In this manner, the designer can quickly find the port list errors and correct them prior to simulation. Such a port list verification method can significantly reduce the time and effort involved in port list debugging. Consequently, the designer can devote more time and resources to the design effort and the end objective of producing the subject design.Type: GrantFiled: July 2, 1998Date of Patent: May 22, 2001Assignee: Micron Technology, Inc.Inventor: Jeffrey R. Brown
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Patent number: 6148432Abstract: One embodiment of the present invention provides a method for designing a circuit that limits the impact of design changes within a module of a circuit to the characteristics of signals flowing between modules of the circuit. This method operates by dividing the circuit into a plurality of circuit modules, and defining a plurality of interface modules located between the plurality of circuit modules. These interface modules include drivers coupled between upstream circuit module outputs and downstream circuit module inputs, so as to isolate the downstream circuit module inputs from the upstream circuit module outputs. Next, the circuit modules and interface modules are designed, and a synthesized circuit is ultimately generated from the designs. This synthesized circuit is then verified for characteristics such as timing. If it fails to verify, design changes are made.Type: GrantFiled: November 17, 1997Date of Patent: November 14, 2000Assignee: Micron Technology, Inc.Inventor: Jeffrey R. Brown
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Patent number: D461357Type: GrantFiled: May 4, 2001Date of Patent: August 13, 2002Assignee: HB Innovation Ltd. (HBi)Inventors: Howard R. Harrison, Jeffrey R. Brown