Patents by Inventor Jeffrey R. Dwork

Jeffrey R. Dwork has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Using an independent clock to coordinate access to registers by a peripheral device and a host system
    Patent number: 6311284
    Abstract: The present invention coordinates access to at least one data register between a peripheral device and a host system. The peripheral device accesses the at least one data register to update the data register with new register data and operates on a peripheral device clock. The host system accesses the at least one data register to read the register data stored within the at least one register via a bus interface that operates on a bus clock. The at least one data register is within a statistics module that operates on an independent clock. The present invention includes a handshaking mechanism for synchronization between the peripheral device clock and the independent clock when the peripheral device has new register data for updating the at least one register.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: October 30, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Jeffrey R. Dwork
  • Generation of a stable reference clock frequency from a base clock frequency that may vary depending on source
    Patent number: 6070248
    Abstract: A clock signal generator within an electronic device locally generates a reference clock signal having a reference frequency from a base clock signal having a base frequency. The base clock signal is from a base signal source that is external to the electronic device, and the base frequency of the base clock signal may vary depending on the base signal source. The present invention includes a plurality of frequency dividers which are coupled to the base signal source. Each of the frequency dividers outputs a divided clock signal having a respective frequency that is the base frequency divided by a respective factor. A multiplexer accepts the value of the base frequency of the base clock signal as stored within a storage device that is external to the electronic device. The multiplexer then selects as the reference clock signal a divided clock signal having a respective frequency that is closest to the reference frequency depending on the value of the base frequency.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: May 30, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ching Yu, Jeffrey R. Dwork
  • System for non-sequential transfer of data packet portions with respective portion descriptions from a computer network peripheral device to host memory
    Patent number: 5948079
    Abstract: A computer network peripheral device transfers received data packets to a storage unit of a host computer system on a nonsequential data packet portion by portion basis instead of a sequential whole data packet by whole data packet basis of the prior art. Any received data packet is segmented into a plurality of data packet portions, and the data packet portions may be transferred in a nonsequential order. Such nonsequential transfer of data packet portions to the storage unit of the host computer system may optimize efficient data processing of the data packets by the host computer system.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: September 7, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Din-I Tsai, Jeffrey R. Dwork