Abstract: A method and system are provided for a molded electronic package geometry that enables control of warpage and die stress. A mold tool can be closed to define a space or cavity about a semiconductor die disposed on a substrate. Once the mold tool is closed, a mold material can be applied to the space to produce a mold cap. The mold cap geometry can have a first surface that is in contact with the surface of the substrate and a second surface that is opposite the first surface. The second surface can define a tapered portion of the mold cap in which the larger thickness of the tapered portion of the mold cap is in proximity to the semiconductor die and the smaller thickness of the tapered portion of the mold cap is away from the semiconductor die. The thickness of the tapered portion can vary linearly or non-linearly.

Abstract: A method and system are provided for an electronic package with embedded materials in a molded structure to control warpage and stress. A first material can be deposited on a substrate with a semiconductor die. The substrate can be a coreless substrate. The substrate with the semiconductor die can be placed in a mold tool that when closed defines a space about the semiconductor die. A second material, such as an epoxy mold compound, for example, can be applied to the defined space to produce a mold cap in which the first material is at least partially embedded in the second material. The first and second materials can have a different modulus and/or coefficient of thermal expansion. The first material can be used to cover electrical components on a surface of the substrate. In some instances, more than one material can be at least partially embedded in the second material.

Abstract: A method and system are provided for a molded electronic package geometry that enables control of warpage and die stress. A mold tool can be closed to define a space or cavity about a semiconductor die disposed on a substrate. Once the mold tool is closed, a mold material can be applied to the space to produce a mold cap. The mold cap geometry can have a first surface that is in contact with the surface of the substrate and a second surface that is opposite the first surface. The second surface can define a tapered portion of the mold cap in which the larger thickness of the tapered portion of the mold cap is in proximity to the semiconductor die and the smaller thickness of the tapered portion of the mold cap is away from the semiconductor die. The thickness of the tapered portion can vary linearly or non-linearly.

Abstract: A stencil and method for depositing a coupon of underfill material onto a substrate that is to receive an integrated circuit die.

Abstract: A stencil and method for depositing a coupon of underfill material onto a substrate that is to receive an integrated circuit die.

Abstract: A stencil and method for depositing a coupon of underfill material onto a substrate that is to receive an integrated circuit die.

Abstract: The invention provides a reflow furnace for an electronic assembly. The electronic assembly comprises a printed circuit board and a device on the printed circuit board. The printed circuit board has solder at a first area near the device and a metallic surface at second area distant from the device. The furnace comprises a frame, a support, a heater, and a shield. The support is secured to the frame and is capable of holding the printed circuit board. The heater is secured to the frame and is capable of heating the printed circuit board while being held by the support. The shield is secured to the frame and is positioned to prevent solder from migrating from the first area to the metallic surface at the second area while the printed circuit board is being heated.