Patents by Inventor Jeffrey Sailer

Jeffrey Sailer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230389190
    Abstract: A system for normalizing the solder interconnects (e.g., normalizing the height of the solder ball interconnects) in a circuit package module (e.g., dual-sided mold grid array package module) after removal from a test board includes a fixture that receives the circuit package module upside down and a stencil removably coupleable to the fixture and over the circuit package module. The stencil has a pattern of apertures that coincides with the pattern of solder interconnects of the circuit package module. Solder paste can be applied over the stencil to pass through the apertures to add solder paste to the solder interconnects. The stencil can be removed from over the fixture, and the circuit package module removed from the fixture. The circuit package module can be heated to reflow the solder interconnects with the added solder paste.
    Type: Application
    Filed: April 19, 2023
    Publication date: November 30, 2023
    Inventors: James David Walling, Jeffrey Sailer
  • Publication number: 20230260880
    Abstract: An electrical package can include a substrate having a first side and a second side opposite the first side. One or more electrical components mounted to the substrate, and a plurality of electrically conductive interconnect members can be coupled to the second side of the substrate. At least one of the interconnect members can be L-shaped. The L-shaped interconnect member with can be positioned at or proximate one of the corners. The interconnect members can be arranged as a two-dimensional array, with first interconnect members each occupying a single array location, and second interconnect members each occupying at least three array locations that are arranged nonlinearly. The package can be a dual-sided molded package.
    Type: Application
    Filed: February 10, 2023
    Publication date: August 17, 2023
    Inventors: Howard E. Chen, Jeffrey Sailer
  • Publication number: 20230215796
    Abstract: An electrical package can include a substrate having a first side and a second side opposite the first side. One or more electrical components mounted to the substrate, and a plurality of electrically conductive interconnect members can be coupled to the second side of the substrate. At least one of the interconnect members can have an elongated shape with a length that is longer than a width. The interconnect member with the elongated shape positioned can be at or proximate one of the corners. The interconnect members can be arranged as a grid, with first interconnect members each occupying a single grid cell, and second interconnect members each occupying at least two grid cells. The second interconnect members can have a shape of two of the first interconnect members coupled by a bridge portion.
    Type: Application
    Filed: December 19, 2022
    Publication date: July 6, 2023
    Inventors: Jeffrey Sailer, Howard E. Chen, Yi Liu
  • Publication number: 20230215795
    Abstract: An electrical package can include a substrate having a first side and a second side opposite the first side. One or more electrical components mounted to the substrate, and a plurality of electrically conductive interconnect members can be coupled to the second side of the substrate. At least one of the interconnect members can have an elongated shape with a length that is longer than a width. The interconnect member with the elongated shape positioned can be at or proximate one of the corners. The interconnect members can be arranged as a grid, with first interconnect members each occupying a single grid cell, and second interconnect members each occupying at least two grid cells. The second interconnect members can have a shape of two of the first interconnect members coupled by a bridge portion.
    Type: Application
    Filed: December 19, 2022
    Publication date: July 6, 2023
    Inventors: Jeffrey Sailer, Howard E. Chen, Yi Liu