Patents by Inventor Jeffrey Schaefer
Jeffrey Schaefer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240110895Abstract: A testing device includes a first member to be positioned on one surface of a part to be tested. A second member to be positioned on an opposed surface of the part to be tested. One of the first and second members have an ultrasonic transmitter and the other has an ultrasonic receiver. At least one of the first and second members have at least one magnetic element and the other of the first and second member have at least one magnetic or at least one ferromagnetic metallic element such that when one of the first and second members moves along the surface of the tested part the other of the first and second members will move along an opposed surface with the one of the members.Type: ApplicationFiled: October 3, 2022Publication date: April 4, 2024Inventors: Douglas McNeil, Jeffrey J. Allen, Joyel Schaefer, Mark R. Gurvich, Michael J. King, Brayton Reed
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Publication number: 20240110847Abstract: A method of testing a part includes placing a first member on a part to be tested. A second member is placed on an opposed surface of the part. One of the members has an ultrasonic transmitter and the other has an ultrasonic receiver. At least one of the members has at least one magnetic element and the other has at least one of a magnetic element or a ferromagnetic metallic element which is attracted to magnets. One of the members moves along the surface of the part such that magnetic attraction causes the other to move along the opposed surface of the part with the one of the members. A controller causes an ultrasonic signal to be sent from the transmitter through the part to be tested which is received by the receiver and then analyzed by an ultrasonic testing machine.Type: ApplicationFiled: October 3, 2022Publication date: April 4, 2024Inventors: Douglas McNeil, Jeffrey J. Allen, Joyel Schaefer, Mark R. Gurvich, Michael J. King, Brayton Reed
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Patent number: 7287323Abstract: A ceramic circuit structure comprising a plurality of ceramic layers and at least one electronic component embedded within the plurality of ceramic layers. Within a first one of the ceramic layers is a via that passes through the ceramic layer. A contact pad is formed on a surface of the ceramic layer. A barrier cap is formed between the via and the contact pad. A dielectric ring covers a peripheral portion of the contact pad and an adjacent portion of the dielectric material layer surface immediately surrounding the contact pad, such that any solder that is applied to the contact does not contact the peripheral portion of the contact pad or the ceramic material.Type: GrantFiled: April 30, 2004Date of Patent: October 30, 2007Assignee: National Semiconductor CorporationInventors: Michael Richard Ehlert, William Jeffrey Schaefer
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Publication number: 20070061874Abstract: Computer system, method and program for determining which support team to assign a security problem. Two or more of the following determinations are made: (a) determining if the support team has responsibility for a security policy for a computer system in which the security problem resides, (b) determining if the support team has responsibility for a subsystem in which the security problem resides within the computer system, (c) determining if the support team has responsibility for a TCP or UDP port for an application associated with the security problem within the computer system, and (d) determining if the support team has responsibility for a type of the security problem by checking for predetermined key words or phrase within a text description of the security problem. The security problem can be a security policy violation or a network based vulnerability.Type: ApplicationFiled: September 15, 2005Publication date: March 15, 2007Applicant: International Business Machines CorporationInventors: Gregory Coppola, Jeffrey Schaefer, Brian Singer
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Patent number: 6800815Abstract: A ceramic circuit structure comprising a plurality of ceramic layers and at least one electronic component embedded within the plurality of ceramic layers. Within a first one of the ceramic layers is a via that passes through the ceramic layer. A contact pad is formed on a surface of the ceramic layer. A barrier cap is formed between the via and the contact pad. A dielectric ring covers a peripheral portion of the contact pad and an adjacent portion of the dielectric material layer surface immediately surrounding the contact pad, such that any solder that is applied to the contact does not contact the peripheral portion of the contact pad or the ceramic material.Type: GrantFiled: January 15, 2002Date of Patent: October 5, 2004Assignee: National Semiconductor CorporationInventors: Michael Richard Ehlert, William Jeffrey Schaefer
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Patent number: 6509863Abstract: A radar field-of-view enhancement method particularly adapted for vehicle radar detection systems having a specified detection zone. In accordance with the invention, a pair of discrete radar beams are employed having differing arc widths. Return signals from the discrete beams are compared and related to the area of a desired detection zone. This approach increases the reliability of detection in the detection zone while minimizing false alarms and missed detection areas. The beams are alternately switched on using discrete sources or by implementing a discrete phase shifting element interposed between the sources.Type: GrantFiled: July 29, 2002Date of Patent: January 21, 2003Assignee: Visteon CorporationInventors: Paul Kirk Zoratti, Jeffrey Schaefer
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Publication number: 20020175852Abstract: A radar field-of-view enhancement method particularly adapted for vehicle radar detection systems having a specified detection zone. In accordance with the invention, a pair of discrete radar beams are employed having differing arc widths. Return signals from the discrete beams are compared and related to the area of a desired detection zone. This approach increases the reliability of detection in the detection zone while minimizing false alarms and missed detection areas. The beams are alternately switched on using discrete sources or by implementing a discrete phase shifting element interposed between the sources.Type: ApplicationFiled: July 29, 2002Publication date: November 28, 2002Applicant: Visteon Global Technologies, Inc.Inventors: Paul Kirk Zoratti, Jeffrey Schaefer
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Patent number: 6452534Abstract: A radar field-of-view enhancement method particularly adapted for vehicle radar detection systems having a specified detection zone. In accordance with the invention, a pair of discrete radar beams are employed having differing arc widths. Return signals from the discrete beams are compared and related to the area of a desired detection zone. This approach increases the reliability of detection in the detection zone while minimizing false alarms and missed detection areas. The beams are alternately switched on using discrete sources or by implementing a discrete phase shifting element interposed between the sources.Type: GrantFiled: April 6, 2001Date of Patent: September 17, 2002Assignee: Visteon Global Technologies, Inc.Inventors: Paul Kirk Zoratti, Jeffrey Schaefer
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Publication number: 20020016668Abstract: A configuration tool, including a computer having a memory and a processor is disclosed. The configuration tool includes a database of transit system information. The database is in communications with the computer. At least one transit information display in communication with the computer over a radio frequency communications link is included. The configuration tool also includes a program running on the computer. The program is configured to define parameters for the at least one transit information display and to store the parameters in the database.Type: ApplicationFiled: June 19, 2001Publication date: February 7, 2002Inventor: Jeffrey Schaefer
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Patent number: 6175162Abstract: Disclosed is a packaged integrated circuit device. The device includes a die having a plurality of electrical contacts on a first surface of the die and a protective film adhered directly to a back surface of the die, the protective film being thick enough to allow laser marking of the protective film without the laser penetrating to the die. In one preferred embodiment, the protective film of the device is a thick film formed by screen printing. In a preferred embodiment, the protective film has a thickness of between about 1.5 and 5 mils. Also, disclosed is a method of fabricating a semiconductor wafer having a wafer substrate with a top surface and a bottom surface and a plurality of dies. In this embodiment, the method includes providing a plurality of dies on the top surface of the wafer substrate, applying a thick film over the bottom surface of the wafer substrate, adhering the thick film to a mounting tape that is not ultraviolet curable, and dicing the wafer to separate the dies.Type: GrantFiled: September 8, 1999Date of Patent: January 16, 2001Assignee: National Semiconductor CorporationInventors: Pai-Hsiang Kao, William Jeffrey Schaefer, Nikhil Vishwanath Kelkar
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Patent number: 6075290Abstract: Disclosed is an IC package. The IC package includes a die having a plurality of conductive pads. A passivation layer is formed over the conductive pads such that the passivation layer has a plurality of passivation vias. Each passivation via is positioned over an associated one of the conductive pads. A resilient protective layer is formed over the passivation layer. The resilient protective layer has a plurality of resilient vias, wherein each resilient via is associated with an associated passivation via. A plurality of under bump pads are in electrical contact with the conductive pads, and each under bump pad is associated with one of the resilient vias. A plurality of contact bumps are formed over the plurality of under bump pads such that each one of the contact bumps is electrically coupled with a selected one of the under bump pads and such that each contact bump is electrically coupled with a selected one of the conductive pads.Type: GrantFiled: February 26, 1998Date of Patent: June 13, 2000Assignee: National Semiconductor CorporationInventors: William Jeffrey Schaefer, Pai-Hsiang Kao, Nikhil Vishwanath Kelkar
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Patent number: 6023094Abstract: Disclosed is a packaged integrated circuit device. The device includes a die having a plurality of electrical contacts on a first surface of the die and a protective film adhered directly to a back surface of the die, the protective film being thick enough to allow laser marking of the protective film without the laser penetrating to the die. In one preferred embodiment, the protective film of the device is a thick film formed by screen printing. In a preferred embodiment, the protective film has a thickness of between about 1.5 and 5 mils. Also, disclosed is a method of fabricating a semiconductor wafer having a wafer substrate with a top surface and a bottom surface and a plurality of dies. In this embodiment, the method includes providing a plurality of dies on the top surface of the wafer substrate, applying a thick film over the bottom surface of the wafer substrate, adhering the thick film to a mounting tape that is not ultraviolet curable, and dicing the wafer to separate the dies.Type: GrantFiled: January 14, 1998Date of Patent: February 8, 2000Assignee: National Semiconductor CorporationInventors: Pai-Hsiang Kao, William Jeffrey Schaefer, Nikhil Vishwanath Kelkar
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Patent number: RE38789Abstract: Disclosed is a packaged integrated circuit device. The device includes a die having a plurality of electrical contacts on a first surface of the die and a protective film adhered directly to a back surface of the die, the protective film being thick enough to allow laser marking of the protective film without the laser penetrating to the die. In one preferred embodiment, the protective film of the device is a thick film formed by screen printing. In a preferred embodiment, the protective film has a thickness of between about 1.5 and 5 mils. Also, disclosed is a method of fabricating a semiconductor wafer having a wafer substrate with a top surface and a bottom surface and a plurality of dies. In this embodiment, the method includes providing a plurality of dies on the top surface of the wafer substrate, applying a thick film over the bottom surface of the wafer substrate, adhering the thick film to a mounting tape that is not ultraviolet curable, and dicing the wafer to separate the dies.Type: GrantFiled: December 17, 2001Date of Patent: September 6, 2005Assignee: National Semiconductor CorporationInventors: Pai-Hsiang Kao, William Jeffrey Schaefer, Nikhil Vishwanath Kelkar