Abstract: A method and apparatus for performing Galois field multiplication with reduced redundancy. Generally, multiplication by a Galois field multiplier involves the multiplication of two polynomials modulo another polynomial. The Galois field multiplier has two Galois Field elements in a field of GF(2n) that correspond to the binary polynomials A[X] and B[X]: A[X]=an-1Xn-1+an-2Xn-2+an-3Xn-3+ . . . a1X+a0, B[X]=bn-1Xn-1+bn-2Xn-2+bn-3Xn-3+ . . . b1X+b0, where n corresponds to a number of terms in a Galois extension field of the Galois multiplier, and n-1 is an order of the polynomial A[X]. Premultiplier logic translates the binary polynomial A[X] into a binary vector cr, where r is the number of terms of the vector. The premultiplier logic is configured to modulo-2 add together various coefficients of the a0 through an-1, coefficients to produce various terms c0 through cr-1 of the cr binary vector.