Patents by Inventor Jeffrey W. Spires

Jeffrey W. Spires has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7457390
    Abstract: A timeshared data tributary mapping system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method buffers data from a plurality of tributaries and stores current buffer-fill information at a rate of about one tributary per Fsys clock cycle. An accumulation of buffer-fill information for the plurality of tributaries is updated with current buffer-fill information every Fsys clock cycle. The accumulation of buffer-fill information for the plurality of tributaries is sampled at a sample rate frequency (Fsample), where Fsample<Fsys. The sampled buffer-fill information is used to calculate a data rate control word for each of the plurality of tributaries, and stuff bit opportunities are serially calculated responsive to the control word. The rate of data being mapped into outgoing tributaries is regulated, and the outgoing mapped tributaries are combined in a SPE.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: November 25, 2008
    Assignee: Applied Micro Circuits Corporation
    Inventors: Jeffrey W. Spires, Ravi Subrahmanyan
  • Patent number: 7440533
    Abstract: A system and modulation method are provided for reducing jitter in the mapping of information into Synchronous Payload Envelopes (SPEs), in a data tributary mapping system. The method comprises buffering data from a plurality of tributaries, and generating buffer-fill information responsive to the buffered data being written and read. The buffer-fill information is filtered, producing rate control information. The rate control information is modulated, and the modulated rate control information is used in controlling the mapping of buffered tributaries into a SPE. The rate control information can be modulated with periodic signals, such as a sine or square wave, and pseudorandom signals with an average value of about zero.
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: October 21, 2008
    Assignee: Applied Micro Circuits Corporation
    Inventors: Jeffrey W. Spires, Ravi Subrahmanyan
  • Patent number: 7212599
    Abstract: The present invention is for an apparatus that receives input data at a non-uniform first data rate carried by a system clock, and provides output data at a substantially uniform second data rate that is nominally equal to the first data rate and is also carried by the system clock. The system clock is faster than the first or second data rates and accordingly, a write enable signal controls the input data that is written into a saturating elastic store and a read enable signal controls the reading and output of data from the saturating elastic store. The saturating elastic store includes a plurality of storage locations and provides a storage fill level indicative of the amount of storage locations currently holding data. A digital filter receives the storage fill level and filters the storage fill level to provide a control word to a digitally controlled read enable signal generator.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: May 1, 2007
    Assignee: Applied Micro Circuits Corporation
    Inventors: Ravi Subrahmanyan, Jeffrey W. Spires
  • Patent number: 6882662
    Abstract: An apparatus for reducing the effects of pointer adjustments, wander, and jitter during desynchronization of a non-uniformly gapped data stream from a payload of a synchronized signal is disclosed. The apparatus utilizes a combination of two pointer adjustment signals embedded in the synchronized signal to determine a bit leak rate of bits from an elastic store following a pointer adjustment event such that the elastic store provides as an output a more-uniformly-distributed-gapped data stream.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: April 19, 2005
    Assignee: Applied Micro Circuits Corporation
    Inventors: Ravi Subrahmanyan, Jeffrey W. Spires
  • Publication number: 20030227988
    Abstract: The present invention is for an apparatus that receives input data at a non-uniform first data rate carried by a system clock, and provides output data at a substantially uniform second data rate that is nominally equal to the first data rate and is also carried by the system clock. The system clock is faster than the first or second data rates and accordingly, a write enable signal controls the input data that is written into a saturating elastic store and a read enable signal controls the reading and output of data from the saturating elastic store. The saturating elastic store includes a plurality of storage locations and provides a storage fill level indicative of the amount of storage locations currently holding data. A digital filter receives the storage fill level and filters the storage fill level to provide a control word to a digitally controlled read enable signal generator.
    Type: Application
    Filed: January 17, 2003
    Publication date: December 11, 2003
    Inventors: Ravi Subrahmanyan, Jeffrey W. Spires
  • Publication number: 20020186719
    Abstract: An apparatus for reducing the effects of pointer adjustments, wander, and jitter during desynchronization of a non-uniformly gapped data stream from a payload of a synchronized signal is disclosed. The apparatus utilizes a combination of two pointer adjustment signals embedded in the synchronized signal to determine a bit leak rate of bits from an elastic store following a pointer adjustment event such that the elastic store provides as an output a more-uniformly-distributed-gapped data stream.
    Type: Application
    Filed: June 7, 2001
    Publication date: December 12, 2002
    Inventors: Ravi Subrahmanyan, Jeffrey W. Spires