Patents by Inventor Jeganathan Markandu

Jeganathan Markandu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7191355
    Abstract: A clock synchronization backup mechanism is disclosed for maintaining clock synchronization during periods of degraded synchronization. The clock synchronization backup mechanism includes a jitter buffer having a fill value at a given sample time which is compared with a threshold. When the jitter buffer fill value exceeds the threshold, a non-normal condition is registered and the local clock frequency is set to a combination of a long-term frequency setting plus a threshold sensitive frequency adjustment. The clock synchronization backup mechanism is particularly useful for overcoming residual errors accumulated due to temperature change, oscillator degradation, and a variety of other system perturbations problematical for clock synchronization mechanisms known in the art.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: March 13, 2007
    Assignee: Nortel Networks Limited
    Inventors: Michel Ouellette, Jeganathan Markandu, James Aweya, Delfin Montuno