Abstract: An image sensor utilizes a pure boron layer and a second epitaxial layer having a p-type dopant concentration gradient to enhance sensing DUV, VUV or EUV radiation. Sensing (circuit) elements and associated metal interconnects are fabricated on an upper surface of a first epitaxial layer, then the second epitaxial layer is formed on a lower surface of the first epitaxial layer, and then a pure boron layer is formed on the second epitaxial layer. The p-type dopant concentration gradient is generated by systematically increasing a concentration of p-type dopant in the gas used during deposition/growth of the second epitaxial layer such that a lowest p-type dopant concentration of the second epitaxial layer occurs immediately adjacent to the interface with the first epitaxial layer, and such that a highest p-type dopant concentration of the second epitaxial layer occurs immediately adjacent to the interface with pure boron layer.

Abstract: A back-illuminated image sensor includes a first pixel, a second pixel, and a channel stop situated between the first pixel and the second pixel to isolate the first pixel from the second pixel. The channel stop includes a LOCOS structure and a region of doped silicon beneath the LOCOS structure. The back-illuminated image sensor also includes a first electrically conductive contact that extends through the LOCOS structure and forms an ohmic contact with the region of doped silicon. The first electrically conductive contact may be grounded, negatively biased, or positively biased, depending on the application.

Abstract: An image sensor is provided that includes a pixel array divided into a plurality of pixel groups. Each pixel group is clocked by a respective plurality of horizontal-register clocks. Clock signals for the image sensor are adjusted. Adjusting the clock signals includes phase-shifting each plurality of horizontal-register clocks by a respective phase delay of a plurality of phase delays. The phase delays are evenly spaced and are spaced symmetrically about zero. With the clock signals adjusted, a target is imaged using the image sensor.

Abstract: An image sensor utilizes a pure boron layer and a second epitaxial layer having a p-type dopant concentration gradient to enhance sensing DUV, VUV or EUV radiation. Sensing (circuit) elements and associated metal interconnects are fabricated on an upper surface of a first epitaxial layer, then the second epitaxial layer is formed on a lower surface of the first epitaxial layer, and then a pure boron layer is formed on the second epitaxial layer. The p-type dopant concentration gradient is generated by systematically increasing a concentration of p-type dopant in the gas used during deposition/growth of the second epitaxial layer such that a lowest p-type dopant concentration of the second epitaxial layer occurs immediately adjacent to the interface with the first epitaxial layer, and such that a highest p-type dopant concentration of the second epitaxial layer occurs immediately adjacent to the interface with pure boron layer.

Abstract: An inspection system and methods in which analog image data values (charges) captured by an image sensor are binned (combined) before or while being transmitted as output signals on the image sensor's output sensing nodes (floating diffusions), and in which an ADC is controlled to sequentially generate multiple corresponding digital image data values between each reset of the output sensing nodes. According to an output binning method, the image sensor is driven to sequentially transfer multiple charges onto the output sensing nodes between each reset, and the ADC is controlled to convert the incrementally increasing output signal after each charge is transferred onto the output sensing node. According to a multi-sampling method, multiple charges are vertically or horizontally binned (summed/combined) before being transferred onto the output sensing node, and the ADC samples each corresponding output signal multiple times. The output binning and multi-sampling methods may be combined.

Abstract: An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer and a doped layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Abstract: An image sensor is provided that includes a pixel array divided into a plurality of pixel groups. Each pixel group is clocked by a respective plurality of horizontal-register clocks. Clock signals for the image sensor are adjusted. Adjusting the clock signals includes phase-shifting each plurality of horizontal-register clocks by a respective phase delay of a plurality of phase delays. The phase delays are evenly spaced and are spaced symmetrically about zero. With the clock signals adjusted, a target is imaged using the image sensor.

Abstract: First and second images of a semiconductor die or portion thereof are generated. Generating each image includes performing a respective instance of time-domain integration (TDI) along a plurality of pixel columns in an imaging sensor, while illuminating the imaging sensor with light scattered from the semiconductor die or portion thereof. The plurality of pixel columns comprises pairs of pixel columns in which the pixel columns are separated by respective channel stops. While performing a first instance of TDI to generate the first image, a first bias is applied to electrically conductive contacts of the channel stops. While performing a second instance of TDI to generate the second image, a second bias is applied to the electrically conductive contacts of the channel stops. Defects in the semiconductor die or portion thereof are identified using the first and second images.

Abstract: An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer and a doped layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Abstract: An image sensor for short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. An anti-reflection or protective layer is formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.

Abstract: A back-illuminated image sensor includes a first pixel, a second pixel, and a channel stop situated between the first pixel and the second pixel to isolate the first pixel from the second pixel. The channel stop includes a LOCOS structure and a region of doped silicon beneath the LOCOS structure. The back-illuminated image sensor also includes a first electrically conductive contact that extends through the LOCOS structure and forms an ohmic contact with the region of doped silicon. The first electrically conductive contact may be grounded, negatively biased, or positively biased, depending on the application.

Abstract: An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Abstract: An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Abstract: An image sensor for short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. An anti-reflection or protective layer is formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.

Abstract: An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Abstract: A Time Delay and Integration (TDI) imaging system utilizing variable voltage readout clock signals having progressively increasing amplitudes defined as a function of pixel row location, where pixel rows positioned to receive/collect/transfer image-related charges at the start of the TDI imaging process are controlled using lower amplitude readout clock signals than pixel rows positioned to receive/collect/transfer image-related charges near the end of the TDI process. The clock signal amplitude for each pixel row is determined by the expected maximum amplitude needed to hold and transfer image charges by the pixels of that row. Multiple (e.g., three) primary phase signals are generated that are passed through splitters to provide multiple identical secondary phase signals, and then drivers having gain control circuitry are utilized to produce voltage readout clock signals having the same phases as the primary phase signals, but having two or more different voltage amplitudes.

Abstract: An inspection system and methods in which analog image data values (charges) captured by an image sensor are binned (combined) before or while being transmitted as output signals on the image sensor's output sensing nodes (floating diffusions), and in which an ADC is controlled to sequentially generate multiple corresponding digital image data values between each reset of the output sensing nodes. According to an output binning method, the image sensor is driven to sequentially transfer multiple charges onto the output sensing nodes between each reset, and the ADC is controlled to convert the incrementally increasing output signal after each charge is transferred onto the output sensing node. According to a multi-sampling method, multiple charges are vertically or horizontally binned (summed/combined) before being transferred onto the output sensing node, and the ADC samples each corresponding output signal multiple times. The output binning and multi-sampling methods may be combined.

Abstract: An image sensor for short-wavelength light and charged particles includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Abstract: An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Abstract: A Time Delay and Integration (TDI) imaging system utilizing variable voltage readout clock signals having progressively increasing amplitudes defined as a function of pixel row location, where pixel rows positioned to receive/collect/transfer image-related charges at the start of the TDI imaging process are controlled using lower amplitude readout clock signals than pixel rows positioned to receive/collect/transfer image-related charges near the end of the TDI process. The clock signal amplitude for each pixel row is determined by the expected maximum amplitude needed to hold and transfer image charges by the pixels of that row. Multiple (e.g., three) primary phase signals are generated that are passed through splitters to provide multiple identical secondary phase signals, and then drivers having gain control circuitry are utilized to produce voltage readout clock signals having the same phases as the primary phase signals, but having two or more different voltage amplitudes.