Patents by Inventor Jencheng Wang

Jencheng Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8924912
    Abstract: A computer-implemented method to debug testbench code of a testbench associated with a circuit design by recording a trace of call frames along with activities of the circuit design. By correlating and displaying the recorded trace of call frames, the method enables users to easily trace as execution history of subroutines executed by the testbench thereby to debug the testbench code. In addition, users can trace source code of the testbench code by using the recorded trace of call frames. Furthermore, users can debug the testbench code utilizing a virtual simulation, which is done by post-processing records of the virtual simulation stored in a database.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: December 30, 2014
    Assignees: Synopsys, Inc., Synopsys Taiwan Co., Ltd.
    Inventors: Chia-Ling Ho, Jian-Cheng Lin, Jencheng Wang
  • Publication number: 20140165023
    Abstract: A computer-implemented method to debug testbench code of a testbench associated with a circuit design by recording a trace of call frames along with activities of the circuit design. By correlating and displaying the recorded trace of call frames, the method enables users to easily trace as execution history of subroutines executed by the testbench thereby to debug the testbench code. In addition, users can trace source code of the testbench code by using the recorded trace of call frames. Furthermore, users can debug the testbench code utilizing a virtual simulation, which is done by post-processing records of the virtual simulation stored in a database.
    Type: Application
    Filed: July 30, 2013
    Publication date: June 12, 2014
    Applicants: Synopsys Taiwan Co., Ltd., Synopsys, Inc.
    Inventors: Chia-Ling Ho, Jian-Cheng Lin, Jencheng Wang
  • Patent number: 8522176
    Abstract: A computer-implemented method to debug testbench code of a testbench associated with a circuit design by recording a trace of call frames along with activities of the circuit design. By correlating and displaying the recorded trace of call frames, the method enables users to easily trace an execution history of subroutines executed by the testbench thereby to debug the testbench code. In addition, users can trace source code of the testbench code by using the recorded trace of call frames. Furthermore, users can debug the testbench code utilizing a virtual simulation, which is done by post-processing records of the virtual simulation stored in a database.
    Type: Grant
    Filed: May 8, 2011
    Date of Patent: August 27, 2013
    Assignee: Synopsys, Inc.
    Inventors: Chia-Ling Ho, Jian-Cheng Lin, Jencheng Wang
  • Publication number: 20110283247
    Abstract: A computer-implemented method to debug testbench and the associated circuit design by recording a trace of call frames along with the activities of the circuit design. By correlating and displaying the recorded call frames, the method enables users to easily trace the execution history of the subroutines and debug the testbench code. In addition, users can trace the source code of the testbench by using the trace of call frames. Furthermore, users can debug with a virtual simulation, which is done by post-processing the simulation records stored in a database.
    Type: Application
    Filed: May 8, 2011
    Publication date: November 17, 2011
    Applicants: SPRINGSOFT, INC., SPRINGSOFT USA, INC.
    Inventors: Chia-Ling Ho, Jian-Cheng Lin, Jencheng Wang