Patents by Inventor Jen-Chi Cheng

Jen-Chi Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit structure and manufacturing method thereof
    Patent number: 8987608
    Abstract: A circuit structure includes an inner circuit layer, a first and a second dielectric layers, a first and a second conductive material layers, and a second and a third conductive layers. The first dielectric layer covers a first conductive layer of the inner circuit layer and has a first surface and first circuit grooves. The first conductive material layer is disposed inside the first circuit grooves. The second conductive layer is disposed on the first surface and includes a signal trace and at least two reference traces. The second dielectric layer covers the first surface and the second conductive layer and has a second surface and second circuit grooves. Widths of the first and the second circuit grooves are smaller than that of the reference traces. The second conductive material layer is disposed inside the second circuit grooves. The third conductive layer is disposed on the second surface.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: March 24, 2015
    Assignee: Unimicron Technology Corp.
    Inventors: Shang-Feng Huang, Cheng-Po Yu, Jen-Chi Cheng
  • CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20140041919
    Abstract: A circuit structure includes an inner circuit layer, a first and a second dielectric layers, a first and a second conductive material layers, and a second and a third conductive layers. The first dielectric layer covers a first conductive layer of the inner circuit layer and has a first surface and first circuit grooves. The first conductive material layer is disposed inside the first circuit grooves. The second conductive layer is disposed on the first surface and includes a signal trace and at least two reference traces. The second dielectric layer covers the first surface and the second conductive layer and has a second surface and second circuit grooves. Widths of the first and the second circuit grooves are smaller than that of the reference traces. The second conductive material layer is disposed inside the second circuit grooves. The third conductive layer is disposed on the second surface.
    Type: Application
    Filed: September 14, 2012
    Publication date: February 13, 2014
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: Shang-Feng Huang, Cheng-Po Yu, Jen-Chi Cheng