Abstract: A display device and a backlight control method of the display device are provided. When a duration of an image occlusion period is shorter than a preset duration, a backlight driving circuit is controlled to respectively provide a first pulse current and a second pulse current in a first light emitting period and a second light emitting period in each frame period, so as to drive a backlight unit to provide a first backlight and a second backlight. Here, the first pulse current is greater than the second pulse current.

Abstract: A feedback control system includes a driver chip and a power chip. The driver chip includes a first output terminal and a first input terminal. The first output terminal is to output a first detection voltage. The power chip includes a second input terminal and a second output terminal. The second input terminal is directly connected to the first output terminal, and the second output terminal is coupled to the first input terminal. The power chip generates a driving voltage according to the first detection voltage and outputs the driving voltage to the first input terminal.

Abstract: A power supply circuit for a switching converter includes a power stage and a signal selector. The power stage has a first voltage port, a second voltage port, a third voltage port and a fourth voltage port, and has a first device terminal and a second device terminal configured to be coupled to a power storage device. The power stage includes a first switch coupled between the first voltage port and the first device terminal, a second switch coupled between the second voltage port and the second device terminal, a third switch coupled between the third voltage port and the first device terminal, and a fourth switch coupled between the fourth voltage port and the second device terminal. The signal selector, coupled to the power stage, is configured to select one of a plurality of control signals to be output to each of the first to fourth switches.

Abstract: A method for compressing pre-compressed data used in a reconfigurable processor, where the pre-compressed data includes a number of data blocks, obtains a current data block, calculates a current checking code of the current data block, and compares the current checking code with an immediately-previous checking code. A tag of the current data block is marked as a first tag if the current checking code and the immediately-previous checking code are different, and is marked as a second tag if the current checking code and the immediately-previous checking code are the same. Only data blocks whose tags are the first tags are saved. A related device for compressing data, and a method and a device for decompressing data are also provided.

Abstract: A method includes sorting a plurality of scanning time lengths of the plurality of transmission ports in an ascending order, generating a scanning priority table after the plurality of scanning time lengths of the plurality of transmission ports are sorted, and scanning at least two transmission ports according to the scanning priority table. A transmission port with a higher priority has a shorter scanning time length. A transmission port with a lower priority has a longer scanning time length.

Abstract: A method for compressing pre-compressed data used in a reconfigurable processor, where the pre-compressed data includes a number of data blocks, obtains a current data block, calculates a current checking code of the current data block, and compares the current checking code with an immediately-previous checking code. A tag of the current data block is marked as a first tag if the current checking code and the immediately-previous checking code are different, and is marked as a second tag if the current checking code and the immediately-previous checking code are the same. Only data blocks whose tags are the first tags are saved. A related device for compressing data, and a method and a device for decompressing data are also provided.

Abstract: A driving circuit, a display apparatus and a driving method thereof are provided. The display panel is divided into a plurality of regions including a first region having a rectangular form and a second region having a free form. The driving circuit generates a plurality of control clocks having a first duty cycle during a first period and a second duty cycle different from the first duty cycle during a second period, or having a first phase shift during the first period and a second phase shift different from the first phase shift during the second period, or having a first driving capability during the first period and a second driving capability different from the first driving capability during the second period.

Abstract: A motion blur effect adjustment method includes partitioning a display panel into at least two regions, tracking positions of eyes for generating position information of eyes tracking by using an image capturing device, acquiring a first region corresponding to a visual range of the positions of eyes from the at least two regions according to the position information of eyes tracking, reducing a first motion blur effect of the first region, and adjusting a second motion blur effect of a second region outside the first region.

Abstract: A pre-charge circuit of a static random access memory (SRAM) controller and a pre-charging method thereof are provided. The pre-charge circuit of the SRAM controller includes a first switch, a second switch and a third switch. A first terminal of the first switch is coupled to a working voltage, a second terminal of the first switch is coupled to a first bit line of the SRAM controller, and the first switch is controlled by a first turn-on signal. A first terminal of the second switch is coupled to the working voltage, a second terminal of the second switch is coupled to a second bit line of the SRAM controller, and the second switch is controlled by a second turn-on signal. The third switch is coupled between the first bit line and the second bit line, and the third switch is controlled by a third turn-on signal.

Abstract: A display driver that includes a first driver integrated circuit being cascaded to a second driver integrated circuit is introduced. The first driver integrated circuit includes a first gamma voltage generator that is configured to output a plurality of first gamma voltages to output terminals of the first gamma voltage generator. The second driver integrated circuit includes a second gamma voltage generator that is configured to output a plurality of second gamma voltages to output terminals of the second gamma voltage generator. Each of the output terminals of the first gamma voltage generator is corresponded to one of the output terminals of the second gamma voltage generator. At least one of the output terminals of the first gamma voltage generator is electrically coupled to the corresponding one of the output terminals of the second gamma voltage generator to output at least one common gamma voltage of the first gamma voltages and the second gamma voltages.

Abstract: A display driver that includes a first driver integrated circuit being cascaded to a second driver integrated circuit is introduced. The first driver integrated circuit includes a first gamma voltage generator that is configured to output a plurality of first gamma voltages to output terminals of the first gamma voltage generator. The second driver integrated circuit includes a second gamma voltage generator that is configured to output a plurality of second gamma voltages to output terminals of the second gamma voltage generator. Each of the output terminals of the first gamma voltage generator is corresponded to one of the output terminals of the gamma voltage generator. At least one of the output terminals of the first gamma voltage generator is electrically coupled to the corresponding one of the output terminals of the second gamma voltage generator to output at least one common gamma voltage of the first gamma voltages and the second gamma voltages.

Abstract: A pre-charge circuit of a static random access memory (SRAM) controller and a pre-charging method thereof are provided. The pre-charge circuit of the SRAM controller includes a first switch, a second switch and a third switch. A first terminal of the first switch is coupled to a working voltage, a second terminal of the first switch is coupled to a first bit line of the SRAM controller, and the first switch is controlled by a first turn-on signal. A first terminal of the second switch is coupled to the working voltage, a second terminal of the second switch is coupled to a second bit line of the SRAM controller, and the second switch is controlled by a second turn-on signal. The third switch is coupled between the first bit line and the second bit line, and the third switch is controlled by a third turn-on signal.

Abstract: A driving circuit, a display apparatus and a driving method thereof are provided. The display panel is divided into a plurality of regions including a first region having a rectangular form and a second region having a free form. The driving circuit generates a plurality of control clocks having a first duty cycle during a first period and a second duty cycle different from the first duty cycle during a second period, or having a first phase shift during the first period and a second phase shift different from the first phase shift during the second period, or having a first driving capability during the first period and a second driving capability different from the first driving capability during the second period.

Abstract: A source driver and an operation method thereof are provided. The source driver includes a chopper circuit and a source driver circuit. A first sub-pixel and a second sub-pixel are temporally or spatially adjacent to each other. The chopper circuit adds original gray-scale data of the first sub-pixel with a first value to serve as new gray-scale data of the first sub-pixel and deducts original gray-scale data of the second sub-pixel by a second value to serve as new gray-scale data of the second sub-pixel. The source driver circuit generates a first driving voltage for the first sub-pixel according to the new gray-scale data of the first sub-pixel and generates a second driving voltage for the second sub-pixel according to the new gray-scale data of the second sub-pixel.

Abstract: A method for a Mobile Industry Processor Interface (MIPI) master device for improving clock recovery at a MIPI slave device includes: transmitting a symbol sequence including a plurality of consecutive symbols which include at least one of a first symbol value and a second symbol value to the MIPI slave device prior to transmitting packet data to the MIPI slave device, wherein the first symbol value and the second symbol value bring relatively larger encoding jitters than other symbol values.

Abstract: A motion blur effect adjustment method includes partitioning a display panel into at least two regions, tracking positions of eyes for generating position information of eyes tracking by using an image capturing device, acquiring a first region corresponding to a visual range of the positions of eyes from the at least two regions according to the position information of eyes tracking, reducing a first motion blur effect of the first region, and adjusting a second motion blur effect of a second region outside the first region.

Abstract: A method includes sorting a plurality of scanning time lengths of the plurality of transmission ports in an ascending order, generating a scanning priority table after the plurality of scanning time lengths of the plurality of transmission ports are sorted, and scanning at least two transmission ports according to the scanning priority table. A transmission port with a higher priority has a shorter scanning time length. A transmission port with a lower priority has a longer scanning time length.

Abstract: A display apparatus including a display panel, a display driver, a controller and an external circuit is introduced. The display drive includes a power circuit that supplies a first voltage and a second voltage to the display panel to sense a plurality of sensing currents flowing through the display panel according to the first voltage and the second voltage in a first operating mode. The display driver receives the plurality of sensing currents and a target current from the display panel in the first operating mode. The controller is coupled to the display driver and configured to determine a plurality of offsets according to the plurality of sensing currents and the target current in the first operating mode. The external memory is coupled to the controller and the display driver to store the offsets in the first operating mode. The display driver and a method adapted to a display apparatus are also introduced.

Abstract: A display apparatus including a display panel, a display driver, a controller and an external circuit is introduced. The display drive includes a power circuit that supplies a first voltage and a second voltage to the display panel to sense a plurality of sensing currents flowing through the display panel according to the first voltage and the second voltage in a first operating mode. The display driver receives the plurality of sensing currents and a target current from the display panel in the first operating mode. The controller is coupled to the display driver and configured to determine a plurality of offsets according to the plurality of sensing currents and the target current in the first operating mode. The external memory is coupled to the controller and the display driver to store the offsets in the first operating mode. The display driver and a method adapted to a display apparatus are also introduced.

Abstract: A display driver that includes a first driver integrated circuit being cascaded to a second driver integrated circuit is introduced. The first driver integrated circuit includes a first gamma voltage generator that is configured to output a plurality of first gamma voltages to output terminals of the first gamma voltage generator. The second driver integrated circuit includes a second gamma voltage generator that is configured to output a plurality of second gamma voltages to output terminals of the second gamma voltage generator. Each of the output terminals of the first gamma voltage generator is corresponded to one of the output terminals of the second gamma voltage generator. At least one of the output terminals of the first gamma voltage generator is electrically coupled to the corresponding one of the output terminals of the second gamma voltage generator to output at least one common gamma voltage of the first gamma voltages and the second gamma voltages.