Patents by Inventor Jen-Hung Huang

Jen-Hung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240114688
    Abstract: A memory structure including a substrate, a first doped region, a second doped region, a first gate, a second gate, a first charge storage structure, and a second charge storage structure is provided. The first gate is located on the first doped region. The second gate is located on the second doped region. The first charge storage structure is located between the first gate and the first doped region. The first charge storage structure includes a first tunneling dielectric layer, a first dielectric layer, and a first charge storage layer. The second charge storage structure is located between the second gate and the second doped region. The second charge storage structure includes a second tunneling dielectric layer, a second dielectric layer, and a second charge storage layer. The thickness of the second tunneling dielectric layer is greater than the thickness of the first tunneling dielectric layer.
    Type: Application
    Filed: November 21, 2022
    Publication date: April 4, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chia-Wen Wang, Chien-Hung Chen, Chia-Hui Huang, Ling Hsiu Chou, Jen Yang Hsueh, Chih-Yang Hsu
  • Patent number: 11942433
    Abstract: In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Jen-Fu Liu, Ming Hung Tseng, Tsung-Hsien Chiang, Yen-Liang Lin, Tzu-Sung Huang
  • Patent number: 11488657
    Abstract: A memory having a plurality of blocks is coupled with control circuits having logic to execute a no-current read setup operation, the read setup operation comprising simultaneously applying a read setup bias to a plurality of memory cells of a selected block of the plurality of blocks while disabling current flow. Logic to traverse the blocks in the plurality of blocks can apply the read setup operation to the plurality of blocks. The blocks in the plurality of blocks can include, respectively, a plurality of sub-blocks. The read setup operation can traverse sub-blocks in a block to simultaneously apply the read setup bias to more than one individual sub-block of the selected block. A block status table can be used to identify stale blocks for the read setup operation. Also, the blocks can be traversed as a background operation independent of read commands addressing the blocks.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: November 1, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Jen-Hung Huang, Han-Sung Chen
  • Publication number: 20220336006
    Abstract: A memory having a plurality of blocks is coupled with control circuits having logic to execute a no-current read setup operation, the read setup operation comprising simultaneously applying a read setup bias to a plurality of memory cells of a selected block of the plurality of blocks while disabling current flow. Logic to traverse the blocks in the plurality of blocks can apply the read setup operation to the plurality of blocks. The blocks in the plurality of blocks can include, respectively, a plurality of sub-blocks. The read setup operation can traverse sub-blocks in a block to simultaneously apply the read setup bias to more than one individual sub-block of the selected block. A block status table can be used to identify stale blocks for the read setup operation. Also, the blocks can be traversed as a background operation independent of read commands addressing the blocks.
    Type: Application
    Filed: April 19, 2021
    Publication date: October 20, 2022
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Jen-Hung HUANG, Han-Sung CHEN
  • Publication number: 20220043233
    Abstract: A fixing ring for a lens module includes a first end surface, a second end surface opposite the first end surface, and a through hole defined through the first end surface and the second end surface. A protrusion is provided on an inner wall of the through hole. The protrusion includes a first inclined surface, a second inclined surface, and a connecting surface. The connecting surface is coupled between the first inclined surface and the second inclined surface. A side of the first inclined surface away from the connecting surface is coupled to the first end surface. A side of the second inclined surface away from the connecting surface is coupled to the second end surface. A light absorbing layer is provided on the connecting surface.
    Type: Application
    Filed: December 1, 2020
    Publication date: February 10, 2022
    Inventors: JEN-HUNG HUANG, CHUN-CHENG KO
  • Publication number: 20220044388
    Abstract: A method for intelligently judging stray light includes obtaining pictures with stray light and an incident light angle corresponding to each of the pictures, determining a stray light judgment mechanism corresponding to each picture according to the incident light angle, determining whether each of the pictures meets an acceptance condition of the corresponding stray light judgment mechanism and obtaining a judgment result, and determining whether the product to be tested is a qualified product based on the judgment result of the pictures.
    Type: Application
    Filed: December 28, 2020
    Publication date: February 10, 2022
    Inventors: JEN-HUNG HUANG, CHUN-CHENG KO
  • Publication number: 20220043325
    Abstract: A light-shielding sheet includes a base defining a first through hole and a second through hole. The first through hole and the second through hole are arranged coaxially in the base. A diameter of the first through hole is smaller than a diameter of the second through hole. The base is provided with a light-shielding coating covering an inner wall of the first through hole and the second through hole. When an incident light angle ? is between 45° and 55°, a following relationship is satisfied: 0.01?W?0.02; 3?D?3.5; 0.0122?W/sin??0.0283. W denotes a thickness of the base W, and D denotes the diameter of the first through hole.
    Type: Application
    Filed: December 1, 2020
    Publication date: February 10, 2022
    Inventors: JEN-HUNG HUANG, CHUN-CHENG KO
  • Patent number: 10788740
    Abstract: A projector and its illumination system and wavelength conversion device are provided. The wavelength conversion device includes a substrate, a wavelength converting portion, and a wavelength maintaining portion. The substrate has a rotation axis. The wavelength converting portion surrounds the rotation axis and is adapted to receive the first beam and convert a first portion of the first beam into a second beam. The wavelength maintaining portion surrounds the rotation axis and is adapted to receive the first beam and guide a second portion of the first beam. A ratio of the first portion of the first beam with respect to the first beam is greater than a ratio of the second portion of the first beam with respect to the first beam. The illumination system and the wavelength conversion device in the projector reduce the number of optical elements, thereby reducing the cost and the size of the projector.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: September 29, 2020
    Assignee: Coretronic Corporation
    Inventors: Chien-Chung Liao, Jen-Hung Huang, Kuan-Ta Huang
  • Publication number: 20180348613
    Abstract: A projector and its illumination system and wavelength conversion device are provided. The wavelength conversion device includes a substrate, a wavelength converting portion, and a wavelength maintaining portion. The substrate has a rotation axis. The wavelength converting portion surrounds the rotation axis and is adapted to receive the first beam and convert a first portion of the first beam into a second beam. The wavelength maintaining portion surrounds the rotation axis and is adapted to receive the first beam and guide a second portion of the first beam. A ratio of the first portion of the first beam with respect to the first beam is greater than a ratio of the second portion of the first beam with respect to the first beam. The illumination system and the wavelength conversion device in the projector reduce the number of optical elements, thereby reducing the cost and the size of the projector.
    Type: Application
    Filed: May 30, 2018
    Publication date: December 6, 2018
    Inventors: Chien-Chung Liao, Jen-Hung Huang, Kuan-Ta Huang
  • Publication number: 20040094095
    Abstract: A new and improved substrate holder assembly for supporting a substrate in a process chamber for the fabrication of semiconductor integrated circuits on the substrate. The substrate holder assembly comprises an annular shield which is fitted in the process chamber. A dish-shaped substrate holder extends through the center of the shield and includes a pair of outwardly-extending pin support flanges that are disposed beneath the shield. The substrate holder includes an annular substrate support shoulder for supporting the substrate. A substrate clamp of the substrate holder assembly includes a pair of downwardly-extending alignment pins which are inserted through respective pin openings in the shield and are supported by the respective pin support flanges. Accordingly, the alignment pins align and support the substrate clamp slightly above the substrate holder to prevent direct contact of the substrate clamp with the substrate holder thus, the formation of potential device-contaminating particles.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 20, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jen-Hung Huang, Cheng-Cong Yu, Wu-Xing Lin
  • Publication number: 20040065257
    Abstract: A new and improved, self-aligning mark shield for PVD chambers. The mark shield of the present invention comprises an annular body having a retainer flange for engaging and retaining a substrate on a substrate support of a process chamber. An annular locating pin is provided on the bottom surface of the body for engaging the substrate support and preventing excessive X- and Y-axis movement of the substrate on the substrate support. The mark shield obviates the need for a standard ceramic isolation assembly to maintain the mark shield in position in the chamber.
    Type: Application
    Filed: October 7, 2002
    Publication date: April 8, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jen-Hung Huang, Wu-Xing Lin, Jiunn-Kae Chiang