Patents by Inventor Jen-I Huang

Jen-I Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230223311
    Abstract: A semiconductor packaging assembly includes a redistribution layered structure having a plurality of device regions and a plurality of cutting regions separating the device regions, a plurality of recess structures respectively formed in the cutting regions, a plurality of chips respectively disposed in the device regions, and an encapsulating layer formed on the redistribution layered structure to fill the recess structures and enclose the chips.
    Type: Application
    Filed: June 14, 2022
    Publication date: July 13, 2023
    Applicant: Powertech Technology Inc.
    Inventors: Kun-Yung HUANG, Jen-I HUANG
  • Patent number: 11437336
    Abstract: A semiconductor package structure includes a first redistribution layer, a plurality of conductive connectors, a chip, and an encapsulant. The first redistribution layer has a first surface and a second surface opposite to the first surface. The first redistribution layer includes at least one conductive pattern and at least one dielectric layer stacked on each other. The conductive pattern includes a plurality of landing pads, and each of the landing pads is separated from the dielectric layer. The conductive connectors are located on the first surface. Each of the conductive connectors is corresponding to and electrically connected to one of the landing pads. The chip is located on the first surface. The chip is electrically connected to the first redistribution layer. The encapsulant encapsulates the chip and the conductive connectors. A manufacturing method of a semiconductor package structure is also provided.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: September 6, 2022
    Assignee: Powertech Technology Inc.
    Inventors: Jeffrey Wang, Jen-I Huang, Kun-Yung Huang
  • Publication number: 20210343674
    Abstract: A semiconductor package structure includes a first redistribution layer, a plurality of conductive connectors, a chip, and an encapsulant. The first redistribution layer has a first surface and a second surface opposite to the first surface. The first redistribution layer includes at least one conductive pattern and at least one dielectric layer stacked on each other. The conductive pattern includes a plurality of landing pads, and each of the landing pads is separated from the dielectric layer. The conductive connectors are located on the first surface. Each of the conductive connectors is corresponding to and electrically connected to one of the landing pads. The chip is located on the first surface. The chip is electrically connected to the first redistribution layer. The encapsulant encapsulates the chip and the conductive connectors. A manufacturing method of a semiconductor package structure is also provided.
    Type: Application
    Filed: May 29, 2020
    Publication date: November 4, 2021
    Applicant: Powertech Technology Inc.
    Inventors: Jeffrey Wang, Jen-I Huang, Kun-Yung Huang
  • Patent number: 9887148
    Abstract: A fan-out semiconductor package includes a layer of adhesive covering a temporary carrier, a first redistribution layer disposed on the layer of adhesive, the first redistribution layer including a first metal layer having recessed areas. Metal pillars are plated to a first group of the recessed areas in the first metal layer. A semiconductor chip next is bonded to a second group of the recessed areas and a molding compound covers the semiconductor chip. The molding compound is then ground to expose tops of the metal pillars. A second redistribution layer including a second passivation layer adhering to the molding compound and a second metal layer covering openings exposing the tops of the metal pillars are then added.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: February 6, 2018
    Assignee: POWERTECH TECHNOLOGY INC.
    Inventors: Jen-I Huang, Ching-Yang Chen
  • Publication number: 20170338128
    Abstract: A manufacturing method of a package structure is provided. The method includes the following steps. A redistribution circuit layer is formed on a first carrier. A die is disposed on the redistribution circuit layer. An encapsulant is formed to encapsulate the die. The first carrier is removed to expose a surface of the redistribution circuit layer. A plurality of recesses are formed on the surface of the redistribution circuit layer. A plurality of conductive terminals are formed corresponding to the recesses on the redistribution circuit layer. Another manufacturing method of a package structure is also provided.
    Type: Application
    Filed: May 2, 2017
    Publication date: November 23, 2017
    Applicant: Powertech Technology Inc.
    Inventors: Jen-I Huang, Ching-Yang Chen
  • Patent number: 8185223
    Abstract: A multimedia playing method is provided. First, N audio files selected by a user are received, wherein N>0. Then, the memory space required for playing each of the N audio files for a predetermined time is respectively detected. Next, whether total memory space required by the N audio files is not smaller than a predetermined value is determined. If the total memory space required by the N audio files is not smaller than the predetermined value, the predetermined time is reduced and the step of respectively detecting the memory space required for playing each of the N audio files for the predetermined time is executed again. If the total memory space required by the N audio files is smaller than the predetermined value, an initial part of each of the N audio files to be played for the predetermined time is stored into the memory.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: May 22, 2012
    Assignee: ITE Tech. Inc.
    Inventors: Jen-I Huang, Chyou-Hsiung Hwang
  • Publication number: 20100138011
    Abstract: A multimedia playing method is provided. First, N audio files selected by a user are received, wherein N>0. Then, the memory space required for playing each of the N audio files for a predetermined time is respectively detected. Next, whether total memory space required by the N audio files is not smaller than a predetermined value is determined. If the total memory space required by the N audio files is not smaller than the predetermined value, the predetermined time is reduced and the step of respectively detecting the memory space required for playing each of the N audio files for the predetermined time is executed again. If the total memory space required by the N audio files is smaller than the predetermined value, an initial part of each of the N audio files to be played for the predetermined time is stored into the memory.
    Type: Application
    Filed: March 10, 2009
    Publication date: June 3, 2010
    Applicant: ITE TECH. INC.
    Inventors: Jen-I Huang, Chyou-Hsiung Hwang