Abstract: A method of forming an integrated circuit structure includes forming a patterned passivation layer over a metal pad, with a top surface of the metal pad revealed through a first opening in the patterned passivation layer, and applying a polymer layer over the patterned passivation layer. The polymer layer is substantially free from N-Methyl-2-pyrrolidone (NMP), and comprises aliphatic amide as a solvent. The method further includes performing a light-exposure process on the polymer layer, performing a development process on the polymer layer to form a second opening in the polymer layer, wherein the top surface of the metal pad is revealed to the second opening, baking the polymer, and forming a conductive region having a via portion extending into the second opening.

Abstract: A semiconductor package and the method of forming the same are provided. The semiconductor package may include a substrate, a semiconductor package component having a semiconductor die bonded to the substrate, a lid attached to the substrate, and a first composite metal feature between the semiconductor package component and the lid. The first composite metal feature may include a first metal feature having a first material and a second metal feature having a second material. The first material may be an intermetallic compound. The second material may be different from the first material.

Abstract: In an embodiment, a method includes forming a device region along a first substrate; forming an interconnect structure over the device region and the first substrate; forming a metal pillar over the interconnect structure, forming the metal pillar comprising: forming a base layer over the interconnect structure; forming an intermediate layer over the base layer; and forming a capping layer over the intermediate layer; forming a solder region over the capping layer; and performing an etch process to recess sidewalls of the base layer and the capping layer from sidewalls of the intermediate layer and the solder region.

Abstract: An electronic device including a display panel and a CPU is provided. The display panel updates displayed images at a refresh rate. The CPU implements a latency monitor, a system resource controller, a display controller, and an application. The latency monitor collects time information related to touch latency. The touch latency is the duration between the time point at which the display panel detects a touch event and the time point at which the display panel displays an image generated by the application in response to said touch event. The display controller informs the system resource controller of the refresh rate. The system resource controller adjusts the resource allocation of the electronic device to cause the touch latency to be lower than a threshold, according to the time information and the refresh rate.

Abstract: A semiconductor package includes a semiconductor element, at least one electronic die, at least one optical die, an encapsulant, and a substrate. The semiconductor element has a first side and a second side opposing to the first side. The at least one electronic die is disposed over the first side. The at least one optical die is disposed over the first side and next to the at least one electronic die. The encapsulant is disposed on the first side and covers the at least one electronic die, where a sidewall of the at least one optical die is distant from the encapsulant, and a sidewall of the encapsulant is aligned with a sidewall of the semiconductor element. The substrate is disposed over the second side, where the at least one electronic die is electrically coupled to the substrate and the at least one optical die through the semiconductor element.

Abstract: A method for adjusting application settings is provided. The method includes using an application setting module to receive at least one performance target from an application running on an electronic device. The method further includes using the application setting module to record at least one performance indicator of the application while the application is running, wherein the performance indicator corresponds to the performance target. The method further includes using the application setting module to estimate the estimated time that the temperature of the electronic device sustains less than the defense temperature. The method further includes using the application setting module to determine the score according to the performance indicator and the estimated time, wherein the score indicates to the application that it should raise, lower, or keep a current setting.

Abstract: A method for skin protection by applying a zinc oxide-on-silicate platelet composite (ZnO/NSP composite) is formulated in a cosmetic composition, to the skin of a subject. The ZnO/NSP composite is made of silicate platelet and ZnO particles adsorbed thereon, in which the ZnO particles are created by the dehydration of Zn(OH)2 formed on the silicate platelet. The ZnO particles adhering on the silicate platelet can effectively improve the dispersibility of zinc oxide particles in water, and the average particle size can reach near nanometer size. Moreover, the ZnO/NSP composite exhibits better antimicrobial and UV light-absorbing properties than ZnO itself, and are not toxic or irritating to the skin.

Abstract: The invention relates to a light emitting diode, which comprises a substrate and a semiconductor epitaxy structure. The semiconductor epitaxial structure is disposed on the substrate. The semiconductor epitaxial structure comprises semiconductor composite layers and a plurality of current spreading layers which are disposed among the semiconductor composite layers. The doping concentrations of the upper and lower adjacent current spreading layers are alternately high and low.

Abstract: A method of handling a workpiece includes the following steps. A workpiece is placed on a chuck body, wherein the workpiece includes a tape carrier extending beyond a periphery of the chuck body and a workpiece body disposed on the tape carrier, and the chuck body includes a seal ring surrounding the periphery of the chuck body; the tape carrier is clamped outside the chuck body, wherein the tape carrier leans against the seal ring and an enclosed space is formed between the chuck body, the tape carrier and the seal ring; and a vacuum seal is formed by evacuating gas from the enclosed space to pull the periphery of the workpiece toward the chuck body.

Abstract: A semiconductor package includes electric integrated circuit dies, photoelectric integrated circuit dies, and an inter-chip waveguide. The electric integrated circuit dies are laterally encapsulated by a first insulating encapsulant. The photoelectric integrated circuit dies are laterally encapsulated by a second insulating encapsulant. Each one of photoelectric integrated circuit dies includes an optical input/output terminal. The inter-chip waveguide is disposed over the second insulating encapsulant, wherein the photoelectric integrated circuit dies are optically communicated with each other through the inter-chip waveguide.

Abstract: A thermal dissipation holder for a handheld electronic device is provided. The thermal dissipation holder includes a main structure, a movable element, an elastic element, and a locker. The main structure has a front surface and a rear surface. The movable element is movably connected to the main structure along a first direction and has a clamp portion at a side away from the carrier. One end of the elastic element is connected to the main structure. The other end of the elastic element is connected to the movable element. The elastic element drives the movable element to move along the first direction. The locker is disposed in the main structure and has a locking portion, where a position of the locking portion corresponds to that of the clamp portion, and the locker is selectively engaged with the clamp portion through the locking portion to lock the movable element.

Abstract: A package structure includes a die, an encapsulation layer, a redistribution layer structure and an adhesive material. The die includes a semiconductor substrate, conductive pads disposed over the semiconductor substrate and a passivation layer disposed over the semiconductor substrate and around the conductive pads. The encapsulation layer laterally encapsulates the die. the redistribution layer structure is disposed on the die and the encapsulation layer, and includes at least one redistribution layer embedded in at least one polymer layer, and the polymer layer contacts a portion of the passivation layer. The adhesive material is disposed on the die and covers an interface between the polymer layer and the passivation layer.

Abstract: A dual mode charge control method includes steps of: detecting an input voltage of the resonance tank, a resonance current of the resonance tank, an output current of the load, and an output voltage of the load; performing a single-band charge control when determining a light-load condition or a no-load condition of the load according to the output current; compensating the output voltage to generate an upper threshold voltage in the single-band charge control, and acquiring a resonance voltage by calculating the resonance current by a resettable integrator; comparing the resonance voltage and the upper threshold voltage to generate a first control signal; generating a second control signal complementary to the first control signal by a pulse-width modulation duplicator; providing the first control signal and the second control signal to respectively control a first power switch and a second power switch of the resonance circuit.

Abstract: A semiconductor package includes a semiconductor device, an encapsulating material, a redistribution structure, and an adhesive residue. The encapsulating material encapsulates a first part of a side surface of the semiconductor device. The redistribution structure is disposed over the semiconductor device and a first side of the encapsulating material. The adhesive residue is disposed over a second side of the encapsulating material opposite to the first side and surrounding the semiconductor device, wherein the adhesive residue encapsulates a second part of the side surface of the semiconductor device.

Abstract: A ride system includes one or more sensors and a controller. The controller receives, from the one or more sensors, position data indicative of the position of a body and/or face of guest on the ride. Using the position data, the one or more controllers, determine a face direction, face rotation, or both of the guest, independent of sensor observations of the face direction and rotation. One or more features of the ride are controlled based upon the determined face direction and/or face rotation.

Abstract: A fan shaft structure includes a fan frame having an axle seat set therein with a stator silicon steel sheet set and a circuit board installed outside the axle seat, a fan blade set in the fan frame holds a rotor magnet therein relative to the outside of the stator silicon steel sheet set, and a rotating shaft has one end assembled at the fan blade and its other end assembled in the axle seat. The outer part of the rotating shaft located in an accommodating groove is mounted with bearings, oil-containing members and oil-retaining caps. The oil film on the inner diameter of the oil-containing members can contact the rotating shaft to fill the gap between the oil-containing members and the rotating shaft, which can prevent external environmental dust, fine particles or foreign matter from penetrating between the rotating shaft and the bearings.

Abstract: A semiconductor package includes an interposer that has a first side and a second side opposing the first side. A semiconductor device that is on the first side of the interposer and an optical device that is on the first side of the interposer and next to the semiconductor device. A first encapsulant layer includes a first portion and a second portion. The first portion of the first encapsulant layer is on the first side of the interposer and along sidewalls of the semiconductor device. A gap is between a first sidewall of the optical device and a second sidewall of the first portion of the first encapsulant layer. A substrate is over the second side of the interposer. The semiconductor device and the optical device are electrically coupled to the substrate through the interposer.

Abstract: A greeting card that selectively opens and closes. The greeting card assembly simulates a firework display in the background of a foreground message when opened. The greeting card assembly has a card section that contains an internal compartment covered by a top panel. A plurality of cutouts are formed through the top panel that are shaped as firework starbursts. LEDs are positioned within the internal compartment for selectively backlighting the cutouts. A light diffusing element is interposed between the cutouts and the LEDs. A speaker is positioned within the internal compartment for playing a digital soundtrack of exploding fireworks. At least one foreground panel is provided that is positioned a distance from the top panel when the greeting card assembly is opened. When viewed, the foreground panels stand in front of a card section that is playing a soundtrack and flashing lights behind starburst cutouts to simulate background fireworks.

Abstract: Compounds and methods for treating diseases mediated by a P2X3 and/or a P2X2/3 receptor antagonist, the methods comprising administering to a subject in need thereof an effective amount of a compound of formula (I): or a pharmaceutically acceptable salt, solvate or prodrug thereof, wherein X is O, D, Y, R1, R2, R3, R4, R5, R6, R7 and R8 are as defined herein.

Abstract: A semiconductor package includes a redistribution structure, a supporting layer, a semiconductor device, and a transition waveguide structure. The redistribution structure includes a plurality of connectors. The supporting layer is formed over the redistribution structure and disposed beside and between the plurality of connectors. The semiconductor device is disposed on the supporting layer and bonded to the plurality of connectors, wherein the semiconductor device includes a device waveguide. The transition waveguide structure is disposed on the supporting layer adjacent to the semiconductor device, wherein the transition waveguide structure is optically coupled to the device waveguide.